Senior Manager, System Integration – Silicon Co-Design Group

About the role

The Senior Manager will lead the System Integration team within SCG, working closely with global teams to ensure critical silicon issues are identified early in the product lifecycle. They will drive strategies to shift post-silicon coverage left, manage dependencies, and build a bench of technical talent.

Responsibilities

• Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs.
• Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, surfacing issues before production readiness.
• Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation.
• Develop new strategies to keep programs on milestone when upstream dependencies — software, firmware, methodology, validation — slip.
• Hire, mentor, and retain senior technical talent. Build a strong bench and grow individual contributors into the next generation of senior technical leaders.
• Partner across architecture, design, DFT, software, firmware, QA, and manufacturing teams.
• Build operational rigor — bring-up tracking, debug forums, and a clear translation of execution data into structured, decision-ready options.

Requirements

• Bachelor’s or Master’s in Electrical or Computer Engineering (or equivalent experience), plus over 12+ overall years of system-level post-silicon bring-up and debug experience, including 5 years leading technical teams, with shipped silicon.
• Direct experience finding critical silicon issues before software was production-ready — including building or scaling wide-area or in-system test programs that ran in production.
• Led technical teams across multiple geographies, with clear examples of attracting, growing, and retaining senior technical talent.
• Strong EE fundamentals across DFT, digital design, computer architecture, power, timing, and fault analysis, plus the ability to translate complex technical issues into clear options for executive audiences.

Qualifications

• A history of process and methodology improvements that meaningfully lifted bring-up velocity, debug efficiency, or shipped silicon quality on programs you led.
• Experience partnering deeply with a counterpart team in India or another major engineering hub — examples of building shared culture, shared metrics, and shared on-call across geographies.
• DFT experience with system-test features for in-field test on production silicon, plus familiarity with fault models, DPPM, quality metrics, and RAS.
• Concrete examples of redesigning how a team works with AI — faster analysis, smarter debug, automated reporting, or workflows the team adopted broadly.

Skills

• Strong leadership skills and the ability to motivate and develop a high-performing team.
• Excellent communication and collaboration skills, both written and verbal.
• Ability to work effectively in a fast-paced, dynamic environment.
• Experience with project management tools and methodologies.

Benefits

• Competitive benefits package.
• Flexible time off.
• Continuous learning opportunities.

Pay

Base salary range: $232,000 - $368,000 USD.

Schedule

NVIDIA offers a flexible schedule to support work-life balance.

Contact Information

To apply, please visit this link at least until August 1, 2026.

Equal Opportunity Employer

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. We highly value diversity in our current and future employees.