Senior FPGA Design and Verification Engineer

This position requires onsite work in Tucson, AZ and an active Secret security clearance. Candidates who do not hold this clearance are not eligible for hire.

About the role

Solidus is seeking a seasoned Senior FPGA Design and Verification Engineer to develop and verify high-performance hardware designs. In this role, you will manage the full development lifecycle from requirements definition through integration and testing. You will work across all major vendor platforms using VHDL to implement critical systems for high-speed communications, digital signal processing, and embedded interfaces.

Responsibilities

• Design and deliver production quality FPGA releases from initial proof of concept up to production
• Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
• Translate system level requirements into FPGA requirements
• Design and code in VHDL for reliability and maintainability
• Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
• Help drive projects and execute to program schedules on time and budget
• Create complete documentation including requirements, verification plan, and user's guides
• May support internal and external technical reviews
• Other duties as assigned

Requirements

• Active Secret clearance is required
• Bachelor's degree with 8+ years of relevant experience, OR Master's degree with 6+ years of relevant experience
• Cultural fit amongst a collaborative team environment
• Minimum 8 years of experience to include at least 1 of the following:
  • Digital design and VHDL coding
  • Xilinx or Microsemi devices and flow tools
  • Delivering FPGA solutions to system level applications
  • Hands on experience with integration and debug

Preferred Skills

• FPGA design experience in one or more of the following areas:
  • Radar processing techniques
  • Image processing techniques for visual and infrared sensors
  • Embedded systems design using ARM, Microblaze, or Nios processors
  • Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
• Constrained random verification in UVM using System Verilog
• Verification utilizing emulation platforms, such as Veloce

Benefits

Solidus offers outstanding benefits, generous PTO, and much more.