Senior Foundry Development Engineer
NVIDIA AI · Santa Clara, CA · 6 days ago
Information TechnologyFull-time
About the role
We are seeking a Foundry Development Engineer to lead high-volume, rapid wafer production in the cutting-edge world of CMOS logic technologies.
Responsibilities
- Manage foundry suppliers to ensure seamless wafer production and delivery from NPI to HVM.
- Optimize device performance, improve yield, conduct WAT analysis, and manage process/fab qualification.
- Facilitate effective communication and manage engineering resources between NVIDIA and foundry suppliers.
- Ensure high production quality control through inline monitoring, SPC review, DPPM reduction, and customer return investigation.
- Collaborate with cross-functional teams to ensure products meet performance, power, yield, and reliability/quality goals.
- Standardize and automate data, procedures, and methodologies across foundries and internal teams to improve operational efficiency.
- Develop advanced solutions to enhance foundry management, improve DPPM, streamline problem resolution, and increase the accuracy of yield and device projections.
- Look for innovative ways to improve current job functions and explore new methods and technologies that can foster team growth and innovation.
Requirements
- BS in EE, Physics, Materials Science, or equivalent experience, with an MS or PhD preferred.
- 8+ years of proven experience in semiconductor wafer manufacturing.
- Self-motivation with strong technical, interpersonal, and communication skills.
- Familiarity with FinFET device physics, CMOS logic process technology, and SPC control.
- Excellent engineering data analysis and presentation skills.
- Constantly seek ways to innovate by improving current job functions through adopting the latest technologies for greater efficiency, or by exploring opportunities beyond the current job scope to drive team growth and innovation.
Qualifications
- MS/PhD in EE, Physics, or Material Science.
- Direct working experience at or with foundry suppliers using advanced CMOS logic technologies.
- Experience in new product introduction and Tapeout/device/yield/QUAL analysis process.
- Proficiency in data analysis and report generation with large datasets, including scripting language skills such as JSL and Python.
- Expertise in JMP.
Skills
- Strong technical skills in semiconductor wafer manufacturing.
- Effective communication and collaboration skills.
- Data analysis and presentation skills.
- Innovative thinking and problem-solving abilities.
Benefits
Base salary range: $168,000 - $258,750. Eligible for equity and benefits.
Pay
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
Schedule
This is for an existing vacancy. Please apply by July 20, 2026.