Senior Formal Verification Engineer - LPU
Thomas To · California, United States · 2 mo ago
HybridQuality AssuranceFull-time
What You Will Be Doing
- Verify AI-related sophisticated ASIC designs & features with formal verification methods.
- Partner with architecture/RTL teams to specify properties, resolve deep design issues, and influence micro-architecture decisions.
- Leverage and unleash the power of formal verification to rigorously verify critical design properties and ensure compliance with specifications, as well as minimize spec ambiguities.
- Articulate formal verification coverage to partners.
- Develop and implement advanced formal verification environments and methodologies for complex ASIC designs, including automated flows for scalability and efficiency.
- Train and coach junior engineers on formal techniques and standard processes; Help on methodology/FAQ documentation.
- Support silicon bring-up and debug using formal methods where it applies.
What We Need To See
- BS/MS/PhD or equivalent experience in CS/CE/EE.
- 12+ years in ASIC verification with 8+ years focused on formal verification methods.
- Mastery of SystemVerilog Assertions (SVA) and formal property verification.
- Proficient on at least one popular formal verification tool in the industry (JapserGold, VC Formal, etc.).
- Good scripting skills for flow automation (tcl, python, etc.).
- Good written and oral communication skills.
- Keen attention to details.
Ways To Stand Out From The Crowd
- Shown success in full-cycle formal sign-off for complex designs.
- Expertise in formal apps: FPV apps, sequential equivalence checks, datapath verification, etc.
- Deep understanding of GPU or LPU architecture/design.
Pay
The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and benefits.