Senior Engineer, GPU RTL Design
Samsung Semiconductor · Austin, Texas Metropolitan Area · 2 wk ago
On-siteEngineering$124k–$208k/yrFull-time
Position Summary
Samsung, a world leader in advanced semiconductor technology, is seeking an Engineer or Senior/Staff GPU RTL Design Engineer to contribute to the design and development of complex RTL blocks and subsystems for Samsung’s next-generation mobile GPU IPs. This role involves collaborating with architecture, power, physical design, and emulation/silicon teams to deliver high-quality, scalable implementations that power premium smartphones and adjacent consumer technologies.
Role and Responsibilities
- Contribute to the design and development of complex RTL blocks and subsystems for Samsung’s next-generation mobile GPU IPs.
- Collaborate closely with architecture, power, physical design, and system-level teams to work across multiple GPU functional domains including control, datapath, cache and memory systems.
- Support technical excellence by driving design quality and accuracy, developing clean, synthesizable RTL, and collaborating with verification teams to enable thorough validation, resolve functional issues, and ensure coverage, robustness, and sustainability.
- Resolve functional design challenges, working with architecture, physical design, and system-level teams to address interface definition, timing, power, performance, and area tradeoffs early in the design cycle.
- Take initiatives on moderate-to-complex projects and help advance best practices, methodologies by exploring emerging GPU technologies and RTL design methodologies.
Skills and Qualifications
- Bachelor’s Degree in Electrical/Computer Engineering and 4+ years of relevant experience OR Master’s Degree in Electrical/Computer Engineering for Engineer and 2+ years of relevant experience. Master’s Degree required for Senior/Staff positions (and relevant experience – Senior : 4+ years, Staff : 8+ years).
- Relevant experience - in semiconductor RTL design for complex SoC, CPU, or GPU architectures.
- Hands-on experience in RTL design using Verilog/SystemVerilog, including microarchitecture development, integration, and debug.
- Working knowledge of GPU or high-performance digital design concepts, including control logic, datapath, memory systems, and Cache design.
- Working knowledge of interpreting architectural specifications and driving design tradeoffs across performance, power, and area (PPA).
- Experience with front-end ASIC design flows, including linting, synthesis, timing analysis, and design quality checks.
- Strong analytical and problem-solving skills, with the ability to identify and propose data-driven solutions.
- Excellent written and verbal communication skills for technical documentation.
- Excellent collaboration skills, with the ability to navigate ambiguity in a fast-paced, global team environment.