Senior Digital Verification Engineer

About the role

Join our team and help us shape the future of computing at the edge and beyond as an experienced Design Verification Engineer, driving the functional verification of complex SoC/IP designs from specification through tapeout on a newly formed verification team. This is a great opportunity to have an influence on our products and processes as we move from the initial stages of product development to market release and scaled volume production.

Responsibilities

• Drive functional verification of complex SoC/IP designs from specification through tapeout
• Own testbench architecture through tapeout on multiple full verification cycles
• Debug complex simulation failures
• Develop Python-based automation for test execution, log analysis, coverage post-processing, and regression flow
• Communicate verification risk, status, and tradeoffs to technical peers and program leadership

Requirements

• Bachelor's or Master's/PhD degree in Electrical Engineering, Computer Engineering, or a related field
• 10+ years of progressive experience in ASIC/SoC design verification with multiple full cycles of ownership from testbench architecture through tapeout
• Expertise in UVM-based testbench architecture and constrained-random verification methodology
• Proficiency in SystemVerilog
• C/C++ experience for modelling or verification
• Demonstrated track record of driving functional and code coverage to tapeout sign-off on complex, multi-million-gate SoC/ASIC designs

Skills

• UVM and SystemVerilog
• Python for test automation, log analysis, coverage post-processing, and regression flow development
• Debugging complex simulation failures
• Formal verification (JasperGold or similar)
• AI Agentic flows for DV
• Software/Firmware based testing and working with software teams pre-silicon
• Post-silicon experience
• SoC Architecture: processors (ARM, RISC-V), interconnects (AMBA AXI/ACE/CHI), memory controllers, DMA engines, interrupt controllers, and standard peripherals
• Power aware verification and UPF

Benefits

• Competitive salary generally ranging from $160,000 to $210,000
• Meaningful equity
• Comprehensive benefits including 401K match
• Company-paid benefits
• Equity program
• Paid parental leave
• Flexibility

Why Join Efficient?

Efficient offers a competitive compensation and benefits package and is committed to personal and professional development, striving to grow together as people and as a company.