Senior DFT - Silicon Validation Engineer

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

About the role

Join NVIDIA's Design-for-Test Engineering team in Santa Clara, CA, where we are driven by a passion for innovation and excellence. We have transformed the industry over twenty years through the invention of the GPU. This powerful technology changed modern computer graphics and parallel computing. Our latest innovations support progress in AI. We keep evolving to solve emerging challenges.

As a Senior DFT - Silicon Validation Engineer, you will work on groundbreaking technologies in DFT to accelerate and left shift silicon validation of the most complex semiconductor chips.

Responsibilities

• Collaborate with multi-functional teams to drive the silicon validation of NVIDIA's chips.
• Drive the end-to-end DFT architecture and methodologies to accelerate post-silicon bring-up and characterization.
• Collaborate across functions to help define the next-generation test strategies for ATE for our product roadmap.
• Lead early silicon validation for complex SoC or equivalent experience.
• Plan from architecture and development, perform chip validation on ATE, debug test content, and analyze silicon behavior under various operating conditions.
• Identify failure root causes and collaborate with a multi-functional team to ensure a strong production ramp.
• Validate and ramp up the yield for our chips, making a significant impact on NVIDIA's technological advancements.

Requirements

• BSEE (or equivalent experience) with 8+, MSEE with 5+ years of experience, or PhD with 3+ years in DFT or related domains.
• Expertise in silicon debug and bring-up & productization of DFT features.
• Demonstrated leadership in driving yield ramp and waste reduction for multiple products.
• Hands-on experience in pre-silicon validation for various DFT features.
• Outstanding written and oral communication skills with the curiosity to work on rare challenges.
• Strong programming and scripting skills in Perl, Python, or Tcl desired.

Skills

• Proven track record of successfully implementing advanced DFT methodologies in groundbreaking semiconductor technologies.
• Strong knowledge of high-speed protocols and semiconductor process technology.
• Knowledge of industry-standard DFT tools and software.
• Strong problem-solving skills and a proactive approach to overcoming technical challenges.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.

Benefits

NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family at www.nvidiabenefits.com.