Senior Silicon Validation Engineer
Google · Sunnyvale, CA · 3 wk ago
On-siteEngineeringFull-time
We need to output HTML fragment with sections: headings for sections like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. Only include sections that have real content. We need to parse the job posting.
Given text includes:
- Minimum qualifications: Bachelor's degree ... 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design.
- Preferred qualifications: Master's degree ... Experience with silicon validation, NPI, bring-up, characterization, qualification of custom silicon. Experience collaborating with cross-functional systems, hardware, manufacturing, vendor teams to drive bring-up, qualification, deployment of custom silicon. Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
- About The Job: paragraph describing role.
- Responsibilities: bullet list after "Responsibilities Learn more about benefits at Google ." Actually the line: "Responsibilities Learn more about benefits at Google . Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle."
Thus responsibilities are a list of items (maybe each sentence is a bullet). We'll format as
for sections like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. Only include sections that have real content. We need to parse the job posting.
Given text includes:
- Minimum qualifications: Bachelor's degree ... 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design.
- Preferred qualifications: Master's degree ... Experience with silicon validation, NPI, bring-up, characterization, qualification of custom silicon. Experience collaborating with cross-functional systems, hardware, manufacturing, vendor teams to drive bring-up, qualification, deployment of custom silicon. Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
- About The Job: paragraph describing role.
- Responsibilities: bullet list after "Responsibilities Learn more about benefits at Google ." Actually the line: "Responsibilities Learn more about benefits at Google . Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle."
Thus responsibilities are a list of items (maybe each sentence is a bullet). We'll format as - each.
- Pay: "Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits". So we have pay info.
- Benefits: Not explicitly listed besides "benefits" mentioned in pay line. There's no separate benefits description. So we should not create a Benefits section unless there is real specific content. The phrase "benefits" appears but not details. So we skip Benefits.
- Schedule: Not mentioned.
- Skills: Not explicit separate list; but we could treat qualifications as skills? The instruction: Use headings for Skills if there is content. There's no explicit "Skills" section; we could combine qualifications into Requirements/Qualifications. Probably better to have sections: About the role (About The Job), Responsibilities, Requirements (minimum qualifications), Qualifications (preferred qualifications), Pay.
We must not repeat job title as heading. No Job ID etc.
We need to preserve all substantive information; do not invent or summarize away detail. So we need to include all details from the posting.
Let's extract each piece.
About The Job: The paragraph(s) after "About The Job". Let's capture:
"In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. CI2 Platform Enablement is charged with helping bring our custom ASIC's from concept through to production. In pre-silicon, we support integration and test on our hardware emulation platforms, and in post-silicon we help develop tests, operate bringup and validation efforts, and ensure our custom ASIC systems are qualified and sustainable. We own and deliver the Silicon Validation effort of our overall silicon product development lifecycle. Efforts may center on power features, interfaces, HBM memory, compute functionality, and/or various aspects of system performance. You will develop and execute test plans, characterize and enable silicon, and investigate and resolve chip and system issues. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more."
We need to keep that as prose inside
.
Responsibilities: list items:
- Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.
- Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.
- Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.
- Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.
- Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle.
We need to keep the quotes exactly? The text includes double quotes around shifting left. We'll keep as is.
Minimum qualifications: "Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design."
We could format as
- each? The instruction: Use
- for any list of duties/requirements/benefits. So we can list each qualification as separate
- . However the minimum qualifications includes two parts: degree and years experience. Could be two list items.
Preferred qualifications: list items:
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Experience with silicon validation, New Product Introduction (NPI), and the bring-up, characterization, and qualification of custom silicon.
- Experience collaborating with cross-functional systems, hardware, manufacturing, and vendor teams to drive the bring-up, qualification, and deployment of custom silicon.
- Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
Pay: "Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits"
We need to put that in a
under Pay heading.
We should not include boilerplate like EEO etc.
Now produce HTML fragment:
About the role
... (the about job paragraph)
Responsibilities
- Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.
- Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.
- Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.
- Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.
- Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design.
Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Experience with silicon validation, New Product Introduction (NPI), and the bring-up, characterization, and qualification of custom silicon.
- Experience collaborating with cross-functional systems, hardware, manufacturing, and vendor teams to drive the bring-up, qualification, and deployment of custom silicon.
- Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
Pay
Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
We should not include Schedule or Benefits sections.
Check that we didn't repeat any content inadvertently. Ensure we didn't include any boilerplate like "Learn more about benefits at Google". That was in the responsibilities line but we omitted that phrase. The original responsibilities line started with "Responsibilities Learn more about benefits at Google ." We removed that phrase as it's not a responsibility; it's a link. The instruction: remove application instructions and boilerplate. That phrase is likely a link; we should drop it. Good.
Check that we preserved all substantive info: The about job paragraph includes all sentences. Did we miss any? Let's verify original about job paragraph:
"About The Job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. CI2 Platform Enablement is charged with helping bring our custom ASIC's from concept through to production. In pre-silicon, we support integration and test on our hardware emulation platforms, and in post-silicon we help develop tests, operate bringup and validation efforts, and ensure our custom ASIC systems are qualified and sustainable. We own and deliver the Silicon Validation effort of our overall silicon product development lifecycle. Efforts may center on power features, interfaces, HBM memory, compute functionality, and/or various aspects of system performance. You will develop and execute test plans, characterize and enable silicon, and investigate and resolve chip and system issues. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our
. Responsibilities: list items: - Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power. - Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams. - Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production. - Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs. - Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle. We need to keep the quotes exactly? The text includes double quotes around shifting left. We'll keep as is. Minimum qualifications: "Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design." We could format as
- each? The instruction: Use
- for any list of duties/requirements/benefits. So we can list each qualification as separate
- . However the minimum qualifications includes two parts: degree and years experience. Could be two list items.
Preferred qualifications: list items:
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Experience with silicon validation, New Product Introduction (NPI), and the bring-up, characterization, and qualification of custom silicon.
- Experience collaborating with cross-functional systems, hardware, manufacturing, and vendor teams to drive the bring-up, qualification, and deployment of custom silicon.
- Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
Pay: "Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits"
We need to put that in a
under Pay heading. We should not include boilerplate like EEO etc. Now produce HTML fragment:
About the role
... (the about job paragraph)
Responsibilities
- Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.
- Design, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.
- Perform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.
- Provide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.
- Partner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design.
Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- Experience with silicon validation, New Product Introduction (NPI), and the bring-up, characterization, and qualification of custom silicon.
- Experience collaborating with cross-functional systems, hardware, manufacturing, and vendor teams to drive the bring-up, qualification, and deployment of custom silicon.
- Experience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.
Pay
Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
We should not include Schedule or Benefits sections. Check that we didn't repeat any content inadvertently. Ensure we didn't include any boilerplate like "Learn more about benefits at Google". That was in the responsibilities line but we omitted that phrase. The original responsibilities line started with "Responsibilities Learn more about benefits at Google ." We removed that phrase as it's not a responsibility; it's a link. The instruction: remove application instructions and boilerplate. That phrase is likely a link; we should drop it. Good. Check that we preserved all substantive info: The about job paragraph includes all sentences. Did we miss any? Let's verify original about job paragraph: "About The Job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. CI2 Platform Enablement is charged with helping bring our custom ASIC's from concept through to production. In pre-silicon, we support integration and test on our hardware emulation platforms, and in post-silicon we help develop tests, operate bringup and validation efforts, and ensure our custom ASIC systems are qualified and sustainable. We own and deliver the Silicon Validation effort of our overall silicon product development lifecycle. Efforts may center on power features, interfaces, HBM memory, compute functionality, and/or various aspects of system performance. You will develop and execute test plans, characterize and enable silicon, and investigate and resolve chip and system issues. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our