Senior Design Verification Engineer, Silicon

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Responsibilities

• Develop verification plans and test plans for digital intellectual properties (IPs) and subsystems.
• Create and utilize verification components and testbench environments for digital logic at RTL using SystemVerilog and industry-standard methodologies such as VMM, OVM, or UVM.
• Execute gate-level simulations (GLS) and Unified Power Format (UPF)-based power simulations, performing debugging to deliver high-performance and low-power hardware.
• Drive coverage-driven verification strategies to ensure complete verification closure for ASICs or FPGAs.
• Utilize scripting languages like Perl or Python to create automation and support various verification techniques.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 8 years of experience verifying digital logic at RTL using SystemVerilog for ASICs or FPGAs.
• Experience verifying digital IP and subsystems.
• Experience working with design verification (DV) testbenches or environments.

Preferred qualifications

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• Experience with verification planning, testplan development, and coverage-driven verification closure.
• Experience creating and using verification components in VMM, OVM, or UVM.
• Experience with UPF-based power simulations and gate-level simulation (GLS) debugging.
• Familiarity with ASIC standard interfaces (e.g., MIPI, ARM AMBA, UART, I2C) and scripting languages like Perl or Python.

Pay

$163,000 - $237,000 (USD) + 15% bonus target + equity + benefits