Senior ASIC Design Verification Engineer
About the role
This position offers an outstanding opportunity to influence the performance of the next generation GPU and SoC, allowing you to have real impact in a multifaceted, technology-focused company with product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
Responsibilities
- Work as part of Circuit Solutions Group to develop various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
- Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies.
- Build and reform world class verification infrastructure and methodologies to meet the unique demands of custom designed IPs.
- Engage in design specification development by participating in discussions on architecture, intent, and implementation of the various IPs.
- Enable system level integration by working with partner teams for test development & debug and delivering Verification IPs.
- Play a key role in development and deployment of agentic AI frameworks for DV workflows such as stimulus generation, regression triage, debug, root cause analysis etc...
Requirements
- BSEE (or equivalent experience) with 5+ years' experience in unit level or sub-system level verification or MS preferred in Electrical, Computer Engineering with 3+ years’ experience in unit level or sub-system level verification.
- Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional coverage development.
- Strong skills with VCS or equivalent simulation tools like Questa is required.
- Strong debugging and analytical skills are required.
- Have a continuous improvement mentality and passionate about delivering bug-free first silicon.
Qualifications
- Proficiency in developing and implementing agentic AI workflows using LLMs.
- Strong knowledge or work experience in custom designed IPs solutions with good understanding of behavioral real number modeling of low level digital or mixed signal designs.
- Strong knowledge or work experience in co-simulation environments such as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains.
- Strong interpersonal skills and ability to work with on-site and remote teams.
- Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
Skills
- Object Oriented Programming
- Verilog
- System Verilog
- UVM
- SVA
- Functional Coverage Development
- VCS or equivalent simulation tools like Questa
- Debugging and Analytical Skills
- AI Frameworks for DV Workflows
- LLMs
- Custom Designed IPs Solutions
- Co-Simulation Environments
- Scripting Languages (Perl, Tcl, Make files)
Benefits
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you to join our team with some of the most hard-working people in the world working together to promote rapid growth.
Pay
Base salary range: $136,000 - $218,500 USD
Schedule
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.