Semiconductor Process Engineer
UST · Santa Clara, CA · 1 wk ago
Manufacturing$70k–$105k/yrFull-time
Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world. UST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries.
About the Role
This is a Semiconductor Process / Defect Analysis Engineering role focused on wafer defect characterization and failure analysis in an R&D or semiconductor manufacturing environment.
Responsibilities
- Design, collect data, analyze, and compile reports on process engineering experiments for defect reduction, within safety guidelines.
- Troubleshoot defect problems, perform Root Cause Analysis, and resolve moderately difficult process engineering issues.
- Implement new technology, products, and analytical instrumentation to support defect study.
- Design the failure analysis (FA) DOE for key defect critical components to troubleshoot wafer defect issues on key R&D programs and major customer escalations.
- Perform FA, collect and analyze data within safety guidelines.
- Communicate FA observations and recommend solution paths in defect troubleshooting.
- Measure wafer defect/film properties, organize data/reports for review in supporting defectivity improvement by SEM/FIB.
- Prepare wafers for experimentation, including cleaning and loading wafers.
- Prepare klarf files.
- Evaluate and recommend performance of process systems.
Requirements
- 1-2 years of experience.
- Bachelor’s or Master’s in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or Microelectronics/Nanotechnology.
Skills
- SEM/FIB operation
- Failure Analysis (FA)
- Root Cause Analysis (RCA)
- Wafer defect analysis
- Defect metrology
- Semiconductor process troubleshooting
- DOE (Design of Experiments)
- Data analysis & reporting
Key Knowledge
- Semiconductor wafer fabrication
- Yield improvement & defect reduction
- SEM/EDS/FIB principles
- Cleanroom & wafer handling
- Process engineering and metrology tools
Pay
Role Location: California
Compensation Range: $70,000-$105,000
Benefits
- Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires), 10 paid holidays, and are eligible for paid bereavement leave and jury duty.
- Eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.
- Eligible for medical, dental, and vision insurance for employees and dependents residing in the US, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits.
- May purchase additional voluntary short-term disability benefits.
- May participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines.
- Benefits offerings vary in Puerto Rico.
- Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.
- Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires) and are eligible to participate in the Company’s 401(k) program with employer matching, as well as medical, dental, and vision insurance for themselves and dependents residing in the US.
- Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires).
- All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.