Security IP Design Engineer

About the role

The Arm Solutions Engineering Security IP Team is seeking creative and enthusiastic Security Hardware Designers to join an innovative and inclusive team. This is an opportunity to make a difference, with great potential for professional growth and technical advancement. You will work with a groundbreaking team on SoC Security Solutions, including Applied Cryptography, Key Management, Embedded Microprocessor Systems, Hardware Root of Trust, Secure Boot, and Access Control.

The team owns the specification, development, verification, and productization of Hardware Security IP and Security Sub-Systems for pioneering SoC designs.

Responsibilities

• Develop architectures, specifications, and sophisticated security hardware functions.
• Partner with verification and implementation peers to build test plans, drive verification closure, support debug, and achieve functional, power, and performance sign-off.
• Architecture specification, RTL and constraint development, bug fixing, and leading design exploration, optimization, and structural checks.
• Contribute to the development and enhancement of processes and methodologies shared by the team.
• Mentor team members and balance demands working with the leadership team on project management, roadmaps, initiatives, and schedules.

Requirements

• Bachelor's or Graduate degree in Computer Science or Electrical/Computer Engineering.
• Established track record of sophisticated ownership and leadership in the successful design and productization of Compute, Multimedia, or Security Sub-Systems and SoCs.
• Advanced understanding of hardware Verilog RTL design, verification, and EDA methodologies.
• Proven experience in Security Hardware, Embedded Processor Systems, Applied Cryptography, Secure Boot, Key Management, and Access Controls.
• Proven experience in SoC architecture including multi-clock domains, AXI/AHB protocols, multi-power domains, and reset architectures.
• Competency with synthesis, timing analysis, constraints development, and ECO methodologies.
• Familiarity with design checks including CDC, RDC, X-Propagation, LINT.
• Familiarity with power management techniques, UPF, power estimation, and power optimization.
• Experience with Perl, Python, TCL, or other scripting languages.
• Familiarity with ARM-based designs and/or ARM System Architectures.
• Experience with SystemVerilog and verification methodologies – UVM/OVM, Portable Stimulus, Hardware/Firmware co-verification.

Benefits

• Competitive salary and total reward package.
• Hybrid working model designed to support high performance and personal wellbeing.
• Accommodations and adjustments during the recruitment process and employment.
• Culture focused on partner and customer focus, teamwork, creativity, innovation, impact, and accountability.
• Commitment to diversity, inclusion, and equal opportunities.

Pay

Salary Range: $161,500-$218,500 per year.

Schedule

Hybrid working patterns determined by teams based on work and team needs, with flexibility limited by local legal, regulatory, tax, or other considerations where applicable.