RF Technology Development Epitaxy and Integration Engineer – Principal Engineer

About the role

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

GlobalFoundries is a leading full-service semiconductor foundry with a global manufacturing footprint spanning three continents. GlobalFoundries' RF Technology Development Organization is looking for an epitaxy and integration engineer in developing semiconductor technologies to join our RF team in Essex Junction, VT.

Responsibilities

• Develop, evaluate and qualify CVD Si / SiGe epitaxial process.
• Define epitaxial growth conditions and controls methodology to meet both the technology performance requirements and the manufacturability criteria
• Responsible for development, optimization, and qualification of FEOL semiconductor devices and processes to meet performance, cost and yield requirements
• Drive integration optimization using DOE methodologies, statistical analysis, and yield learning techniques.
• Partner with unit process module engineers, failure analysis and characterization team to improve device performance and yield
• Own and drive technical process problem solving.
• Interact with internal & external customers and respond to technical queries.
• Establish new technology design rules, test structures and test methodologies.
• Innovate new methods of continuous process/device improvement.
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Requirements

• Education – Graduating with Master’s or PhD in Electrical, Materials Science, or other relevant engineering or physical science discipline from an accredited degree program.
• Familiarity with epitaxial growth techniques and hands-on experience with epitaxial growth – silicon or III-V
• Must have at least an overall 3.0 GPA and proven good academic standing.
• Language Fluency - English (Written & Verbal)

Qualifications

• Minimum 2 Years of Experience in Silicon or SiGe BiCMOS FEOL or BEOL or III-V processing and/or semiconductor process development
• Minimum 2 years of relevant epitaxial growth engineering experience.
• Knowledge of semiconductor device physics and/or RF fundamentals (e.g. S-parameters