Research Engineer II/III - FPGA, real-time and HPC code development (C programming)
From our Ann Arbor, MI office, we have an opening for a Research Engineer focused on FPGA and low-level code development (C and C++) for real-time and high-performance computing (HPC) applications in remote sensing and surveillance.
About the Role
You will participate in multi-disciplinary, collaborative teams to develop state-of-the-art remote sensing and surveillance processing algorithms and software implemented on real-time hardware. Relevant sensor types include electro-optic/infrared and active/passive radar imaging systems. This position is within the Advanced Technology and Systems Division (ATSD), which advances technology in areas such as radar, electronic warfare, imaging, robotics, quantum sensing, marine technology, and applied optics.
Responsibilities
- Implementation of complex algorithms on FPGAs.
- Collaboration with algorithm developers to enhance performance of algorithms on FPGAs.
- Development of software to control sensors and processing nodes.
- Configure processing nodes to optimize performance.
- Participate in laboratory work, collecting and analyzing sensor data.
Requirements
- Minimum qualifications:
- RE II: Bachelor’s degree with 2+ years of experience OR M.S. degree.
- RE III: Bachelor’s degree with 5+ years of experience OR M.S. with 3+ years of experience.
- Area of study: Electrical Engineering, Computer Engineering, Computer Science, Physics, Math, or a related field.
- U.S. Citizenship with the ability to obtain and maintain a U.S. government security clearance.
- FPGA programming and embedded computing experience.
- Software development experience in C and/or C++.
- Experience with Unix/Linux operating systems and multi-threaded/parallel computing.
- Strong analytical ability.
- Ability to support occasional travel for meetings and/or data collections.
Skills
- Digital Signal Processing (DSP) theory and implementation.
- Experience with Matlab and/or Python.
- Networking hardware/software/administration.
- Basics of digital system design.
Pay
The salary range is:
- RE II: $90,580–$134,740
- RE III: $115,710–$172,115
Salary ranges vary based on geographic location, market competitiveness, and internal equity. Positions may also qualify for SRI’s Pay for Outstanding Performance program or the annual Performance-Based Compensation program.
Benefits
SRI offers a competitive benefits package. For details, visit SRI’s benefits page.