Product Manager — Feature‑Rich CMOS Product Line

About the role

As a Product Manager for our feature‑rich CMOS product line, you will own product strategy and execution from market discovery through roadmap definition, requirements, and lifecycle management. You will partner closely with Engineering, Applications/FAE, Sales, Operations, and Marketing to deliver differentiated products that win in competitive design cycles and meet customer system‑level needs.

Responsibilities

• Product Strategy & Roadmap: Define product vision, strategy, and multi‑generation roadmap aligned to market trends and customer requirements; identify whitespace opportunities and translate insights into product concepts and business cases.
• Requirements & Execution: Own PRDs/MRDs and translate customer use cases into clear requirements (performance, power, area, cost, features, reliability, security, quality); lead cross‑functional trade‑off decisions across architecture, feature set, and cost targets.
• Customer & Market Leadership: Engage directly with customers and partners to capture voice‑of‑customer, validate requirements, and refine value propositions; support key design‑ins with technical depth in collaboration with Sales and FAEs.
• Business Ownership: Manage product line P&L inputs: pricing strategy, competitive positioning, margin targets, and volume forecasts; track KPIs (pipeline, design wins, revenue, ASP, margin, attach/cross‑sell) and drive actions to achieve targets.
• Lifecycle Management: Own lifecycle activities: product launch readiness, portfolio rationalization, PCNs/EOL planning, and sustaining priorities.
• Cross‑Functional Leadership: Drive alignment across engineering, test, quality, operations, and commercial teams to deliver to schedule, cost, and performance commitments.
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Qualifications

Required

• 5+ years experience in the semiconductor industry (product management, applications, systems, design, or related).
• Strong technical foundation (EE/CE/Physics or equivalent experience) with ability to engage on architecture and system‑level tradeoffs.
• Demonstrated customer knowledge: design cycles, qualification expectations, and decision drivers.
• Proven ability to influence cross‑functional stakeholders and make data‑driven decisions.

Preferred

• Experience with CMOS feature‑rich devices (e.g., mixed‑signal, connectivity, MCU/SoC, imaging/sensing, interface ICs, power management in CMOS).
• Familiarity with silicon lifecycle realities (bring‑up, errata management, qualification, yield/reliability, PCN/EOL).
• Experience with pricing/packaging strategy and competitive positioning.

Success Metrics

• Roadmap adoption and on‑time milestone delivery.
• Increased design wins and pipeline conversion.
• Revenue/margin achievement and measurable competitive win rate.

Pay

Expected Salary Range: $118,000 – $210,000. The exact salary will be determined based on qualifications, experience and location.