Product Line Manager, Optical I/O Chiplets

Key Responsibilities

• Own the product strategy for the TeraPHY™ optical chiplet family.
• Author comprehensive PRDs that set the direction for engineering and manufacturing execution.
• Drive the chiplet through the full product lifecycle — definition, tapeout, silicon bring-up, reliability qualification, test/yield ramp, and high-volume manufacturing.
• Steer the product through the internal PLC (Product Life Cycle) gate process in partnership with Engineering, Quality, Operations, and foundry/OSAT partners.
• Track the evolution of AI clusters, networking switch fabrics, and disaggregated memory to shape the I/O chiplet roadmap with target customers.
• Develop high-quality white papers, datasheets, application notes, and other collateral aimed at customers and partners.
• Act as the primary interface for Tier 1 Cloud Service Providers (CSPs), xPU architects, and networking OEMs on chiplet integration, co-packaging, and deployment into their platforms.

Basic Qualifications

• Education: BS in Electrical Engineering or equivalent.
• Experience: 5+ years in product management or technical product roles for advanced-node silicon — chiplets, I/O die, SoCs, networking ASICs, SerDes, or memory interfaces.
• Silicon Photonics and optical communications experience is a plus.
• Demonstrated ownership of a complex chip from definition through high-volume production, including foundry/OSAT engagement, reliability qualification, and test/yield ramp.
• Strong grounding in advanced packaging (2.5D/3D, chiplet integration), UCIe or comparable die-to-die interconnect, and high-speed SerDes/signaling.
• Strong project management and communication skills.
• Self-motivated to execute with minimal direction.

Preferred Qualifications

• Education : MS in Electrical Engineering or equivalent.
• MBA is a plus.

Salary Range

$170,000 - $223,000