Product Engineer

About the role

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. This strategy is supplemented by AI-augmented development practices to empower our team to focus on creative problem-solving and innovation.

The Principal Product Engineer is a critical technical interface between Cadence and top-tier customers, ensuring high-quality support and engagement throughout the lifecycle of customer programs. The engineer manages all technical communications, drives resolution of customer issues, coordinates critical technical reviews, and ensures successful silicon bring-up and product integration. You will collaborate closely with internal design, validation, and applications teams as well as the customer’s program manager to deliver high-quality outcomes on aggressive schedules.

Responsibilities

• Act as the main technical point of contact for customer engineering teams; attend and lead weekly customer calls organized by program management.
• Ensure inclusion in all relevant customer communications, technical deep-dives, and milestone reviews; provide status updates and action tracking.
• Demonstrate a strong understanding of Physical and Protocol layers for at least one high-speed interface (e.g., PCIe, Ethernet, USB, CXL, UCIe).
• Demonstrate hands-on experience with oscilloscopes, BERTs, protocol exercisers, and analyzers.
• Diagnose silicon-related issues and interpret test results effectively.
• Own all support cases filed by the customer across platforms such as SFDC, Sherlock, and Jira.
• Evaluate and triage incoming cases, determine severity and urgency, and ensure timely resolution in alignment with agreed service levels.
• Serve as the technical escalation path for complex issues requiring cross-functional involvement (design, validation, firmware, applications).
• Organize and lead reviews such as SDC/constraint checks, physical integration assessments, pre-tape out checklist reviews, and bring-up test plan evaluations.
• Collaborate closely with the customer program manager to ensure smooth communication and inclusion in all relevant meetings.
• Maintain standardized documentation including kickoff materials, status dashboards, and silicon reports. Track case metrics and provide progress updates.
• Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables. Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.

Requirements

• Bachelor’s in computer science or electrical engineering degree with +2 years of relevant experience, or Master’s degree in a related field.
• Skilled at listening to customer concerns and identifying potential issues early.
• Strong commitment to customer satisfaction and timely case resolution.
• Broad technical background in relevant IPs (both hard and soft) and product engineering.
• Strong communication and organizational abilities.
• Experience performing Physical Layer and Protocol Layer validation for at least one high-speed SERDES technology.
• Hands-on experience with post-silicon PHY bring-up, system interoperability, and compliance testing activities.
• Proficiency in using protocol analyzers, BERTs, and oscilloscopes.
• Familiarity with case management systems such as SFDC and Jira.
• Ability to prioritize cases, anticipate escalations, and manage technical reviews effectively.
• High-level understanding of technical issues with the capability to coordinate with subject matter experts.
• Proactive in gathering feedback and driving continuous improvement initiatives.
• Able to travel onsite to support customers with Silicon bringup and debug (10% travel).

Qualifications

BE/BTech/ME/MS/MTech in Electrical, Electronics or Computer Science Engineering.