Principal SOC Architect, AI Accelerators (Multiple Locations)

Responsibilities

Understand trends in datacenter security, RAS and virtualization through customer and ODM engagements.
Work with customers to determine HW and SW requirements.
Analysis of the current AI server deployments in different datacenters.
Architect enhancements required for deployment of next-generation AI products.
Design the SOC architecture for at least one or more of the following areas: RAS, Reliability analysis of the card, server and rack level systems, Design/architect for easy serviceability, Implement HW/SW techniques for improved availability to mitigate failures, Virtualization, Support multiple clients using VMs on the same HW platform, Leverage industry best practices for security and isolation between clients.

Requirements

• Master's degree or equivalent in Engineering, or related field. 10+ years HW design, testing and commercialization experience.
• 3+ years of experience of working in datacenter related products - servers, accelerators etc.
• In-depth knowledge of datacenter - security, RAS, virtualization, telemetry, power, cooling, lifecycle, deployments etc.
• Good knowledge of scale-up and scale-out architectures.
• Willingness to work in a high-caliber international/multi-site team.

Preferred Skills And Experience

• Experience and knowledge of Server SOC security specifically in the area of Confidential Compute.
• Participation in OCP Security Forum and Confidential Compute Forum.
• Experience and knowledge in defining RAS infrastructure at the Server SoC level.
• Experience and knowledge of PCIe protocol spanning SRIOV, SIOV, IDE, TDISP etc.
• Good knowledge of server SOC architectures focusing on security, RAS and virtualization.
• Good knowledge of Ethernet protocols with emphasis on error recovery and virtualization.
• Ability to work with PdM (Product Marketing) and datacenter customers to define requirements covering security, RAS and virtualization etc.

Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Pay Range And Other Compensation & Benefits

$126,000.00 - $229,800.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted.