Principal Silicon Performance Architect

About the role

We are forming a small, agile engineering team to accelerate a new initiative focused on artificial intelligence (AI) performance - from micro-architecture exploration through end-to-end workload validation. You’ll work at the intersection of silicon, systems, and software, partnering cross-functionally with chip and system architects, as well as inference software engineers to drive data-backed design decisions and deliver step-function improvements in throughput, latency, and efficiency.

Responsibilities

• Extend and adapt simulation infrastructure to model new micro-architecture innovations for AI inference.
• Analyze performance for current and forward-looking AI inference workloads across latency, throughput, and efficiency dimensions.
• Drive design-space exploration using AI-assisted workflows, automation, and large-scale experiment generation.
• Communicate performance insights clearly and influence architecture decisions through data-driven recommendations.
• Collaborate closely with chip, system, and software architects to propose, evaluate, and iterate on architectural variations.

Qualifications

Required/Minimum Qualifications: Bachelor's Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to C/C++, PythonOR equivalent experience.

Other Requirements: Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

• Advanced Degree (Master's, Ph.D.) in Electrical Engineering, Computer Engineering, or related field.
• Experience in chip architecture or micro-architecture analysis at the logical level, including memory, functional units, memory controllers, and Input/Output (I/O) controllers.
• Experience in performance engineering, including profiling, bottleneck analysis, experimental design, and micro-architecture trade-off analysis.
• Experience using performance modeling or simulation to evaluate hardware/software trade-offs across chip, system, and software teams.
• Experience with AI inference acceleration features and accelerator or Graphics Processing Unit (GPU) performance analysis.
• Experience with the AI inference software stack, including compilers, runtimes, and model serving systems.
• Experience modifying architectural simulators or performance modeling codebases (e.g., C, C++, or Python).

Pay

Software Engineering IC6 - The typical base pay range for this role across the U.S. is USD $165,600 - $296,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $220,800 - $331,200 per year.