Principal Modem PHY IP Design Verification Engineer - Terawave

About the role

This role is responsible for leading and executing verification of advanced modem PHY IP for the Terawave program. The ideal candidate combines strong digital design verification skills with a solid understanding of modem PHY and DSP systems.

Responsibilities

• Develop and execute verification strategy and plans for modem PHY IP and subsystem-level integration.
• Create testbenches, stimulus, checkers, scoreboards, assertions, and coverage models to verify modem PHY functionality and corner cases.
• Verify key PHY IP functions such as: modulation and demodulation timing and frequency synchronization, channel estimation and equalization, MIMO / beamforming support, FEC integration, control, configuration, and status interfaces, impairment handling and recovery behavior.
• Collaborate with PHY algorithm and architecture teams to correlate RTL behavior against floating-point, fixed-point, or bit-accurate reference models.
• Define and track functional, code, assertion, and scenario coverage to ensure verification completeness.
• Develop constrained-random and directed test strategies for feature, stress, and corner-case validation.
• Identify, debug, and root-cause design and integration issues in collaboration with RTL and architecture teams.
• Support verification of performance-sensitive designs with attention to throughput, latency, buffering, and protocol timing behavior.
• Contribute to regression automation, CI flows, and verification infrastructure improvements.
• Support subsystem integration, FPGA prototyping, emulation, and post-silicon debug as needed.
• Document verification plans, test results, coverage status, and quality metrics.
• Work effectively with internal engineering teams and external design service partners to drive verification closure.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field.
• 10+ years of experience in digital design verification, ASIC/SoC verification, or modem/baseband verification.
• Strong experience with SystemVerilog and modern verification methodologies such as UVM.
• Experience developing verification environments for complex DSP, modem, or communications IP.
• Familiarity with one or more of the following modem PHY areas: OFDM and/or single-carrier systems, synchronization channel estimation and equalization, FEC such as LDPC, Polar, Turbo, or BCH, MIMO / beamforming, fixed-point and quantized signal processing.
• Experience with scripting and automation using Python, Perl, shell, or similar tools.
• Strong debugging and problem-solving skills across RTL, testbench, and model correlation issues.
• Ability to work closely with design, architecture, and systems teams in a fast-paced development environment.

Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, Signal Processing, Communications, or related field.
• Experience verifying modem PHY or baseband IP for: mmWave / sub-THz / Terahertz systems, satellite or space communications, 5G/6G systems, high-throughput wireless backhaul or mesh systems.
• Experience with MATLAB, C/C++, or Python-based reference models for algorithm correlation.
• Familiarity with assertions, formal verification, lint, CDC, RDC, and low-power verification methodologies.
• Experience with emulation, FPGA prototyping, and post-silicon validation/debug.
• Knowledge of RF/system impairments and their impact on modem PHY behavior, including phase noise, frequency offset, nonlinearities, and channel effects.
• Experience working with external IP vendors or design service partners.
• Ability to operate effectively in an ambiguous, fast-moving development environment.

Skills

• Strong digital design verification skills.
• Solid understanding of modem PHY and DSP systems.
• Experience with SystemVerilog and modern verification methodologies.
• Experience developing verification environments for complex DSP, modem, or communications IP.
• Experience with scripting and automation using Python, Perl, shell, or similar tools.
• Strong debugging and problem-solving skills.
• Experience with RF/system impairments and their impact on modem PHY behavior.

Benefits

• Base Pay Range: $269,175.00 - $376,843.95
• Other Site Ranges May Differ
• Culture Statement: Blue Origin is dedicated to building an authentic workplace.
• Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
• Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
• Stock Options for all regular employees (working at least 20 hours/week)
• Additional Benefits: Bonuses based on individual contributions and company results, depending on role type and job level.

Pay

Base Pay Range For CA applicants is $269,175.00 - $376,843.95

Schedule

Not specified