Principal Modem SoC Engineer - Terawave

About the role

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Responsibilities

• Define top-level or cross-subsystem digital architecture for Satellite communication ASICs and SoCs.
• Lead hardware realization of key communication functions such as modem pipelines, coding engines, digital beamforming, switching fabrics, and packet/data processing.
• Drive end-to-end technical planning from concept through silicon validation.
• Establish system-level tradeoffs among throughput, latency, power, die area, reliability, and manufacturability.
• Provide technical leadership across design, verification, physical design, firmware, packaging, and system teams.
• Review and influence architectural partitioning between ASIC, FPGA, software, and RF/analog domains.
• Develop methodologies and reusable IP strategies that improve schedule, quality, and scalability.
• Mentor technical leaders and act as a go-to expert for critical design reviews and issue resolution.
• Support roadmap planning and future product definition.

Requirements

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
• 12+ years of ASIC design experience, including ownership of complex chips or multiple tape-outs.
• Expert-level knowledge of digital design, microarchitecture, and full-chip tradeoffs.
• Proven success leading technically exciting silicon programs.
• Strong understanding of communication signal-processing hardware and system integration.
• Ability to influence across organizations and communicate complex technical topics clearly.

Qualifications

• Deep expertise in Space based communications, digital modems, phased arrays, or payload processing.
• Experience in advanced FEC architectures, timing recovery, carrier recovery, or channel adaptation hardware.
• Familiarity with rad-hard, fault-tolerant, or high-availability digital design techniques.
• Experience guiding architecture across both commercial and mission-critical applications.
• Strong record of innovation, patents, publications, or major product launches.

Skills

• Strong analytical and problem-solving skills.
• Excellent communication and interpersonal skills.
• Ability to work effectively in a fast-paced, dynamic environment.
• Knowledge of relevant industry standards and best practices.

Benefits

• Medical, dental, vision, basic and supplemental life insurance.
• Paid parental leave.
• Short and long-term disability.
• 401(k) with a company match of up to 5%.
• Education Support Program.
• Stock Options for all regular employees (working at least 20 hours/week).
• Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
• Other benefits may vary depending on site.

Pay

Base Pay Range For CA applicants is $269,175.00 - $376,843.95 WA applicants is $269,175.00 - $376,843.95 Other Site Ranges May Differ

Schedule

Not specified