Principal Engineer – Physical Design
Microchip Technology Inc. · Chandler, AZ · 2 wk ago
On-siteEngineeringFull-time
About the role
Microchip’s CAD Physical Design (PD) team is looking for a Principal Engineer to work on Full Chip APR/Physical Implementation (Netlist-to-GDSII). In this role, you will be working as part of a worldwide team in all areas of Physical Implementation including APR of hierarchical, low-power, multi-mode, multi-corner mixed-signal designs.
Responsibilities
- Perform all aspects of physical design flows such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, and physical verification.
- Lead full-chip Physical Design activities.
- Apply advanced knowledge of VLSI logic principles, clock structures, and design timing closure.
- Utilize sign-off tools for Static Timing Analysis, Formal Equivalence, Parasitic Extraction, Power Integrity, and Physical Verification.
- Implement UPF and Low Power design practices throughout the entire physical design flow.
- Collaborate with multiple teams across a geographically diverse company to achieve design goals.
Requirements
- Bachelor’s or Master’s Degree in Electrical/Electronics Engineering with 10+ years of relevant experience.
- Advanced knowledge of place-and-route methodologies.
- Recent experience with leading full-chip Physical Design activities.
- Daily use of ICC/ICC2 or Innovus is preferred.
- Experience with 40nm or 28nm technologies is required; 16nm or smaller technology preferred.
- Proficiency in Tcl and Perl scripting is essential.
- Excellent written and verbal communication skills.
- Excellent problem-solving and debugging skills.
- Self-motivated team player capable of collaborating across geographically diverse teams.
Skills
- Hands-on experience in physical design flows (floor planning, placement, CTS, routing, verification).
- Advanced knowledge of VLSI logic principles and clock structures.
- Familiarity with sign-off tools for STA, Formal Equivalence, Parasitic Extraction, Power Integrity, and Physical Verification.
- Knowledge of UPF and Low Power design practices.
Travel
0% - 25% travel time.
Physical Requirements
- 80% sitting, 10% walking, 10% standing.
- Requires hearing, seeing, and talking.
- Involves working both alone and around others.