Principal Engineer, IO Design

About the role

We are seeking a Principal IO/Clocking Design Engineer to join our design team, working on critical high-speed circuits common to all DRAM-related memory products. In this position, you will develop, design, optimize, verify, and fan out these high-speed circuits across all DRAM projects at Micron. Your work will include equalization and bandwidth extension to push the speed limits of circuit and process technology, analyzing IO impairments, clock jitter, duty error impact on DRAM systems, and developing effective engineering solutions.

Responsibilities

• Innovate, design, optimize, and verify high-speed IO and clocking circuits used in new DRAM products.
• Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at the circuit level.
• Develop accurate modeling, analysis, and simulation methodology to capture key circuit performance metrics and their impact on product specifications at full-chip and system levels.
• Work with Product Engineering and Signal Integrity (SI) teams to compare silicon performance with simulation results and support correlation activities.
• Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node.

Requirements

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design.
• Proficiency with UNIX and Cadence design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices for high-speed circuits to minimize parasitic impacts.
• Strong communication skills with the ability to convey sophisticated technical concepts to peers both verbally and in writing.
• Mental agility to work with all product types (commodity, mobile, graphics) and product teams in parallel with silicon validation efforts.

Preferred Qualifications

• 7+ years of experience in high-speed transmitter, receiver, and clocking circuit design and optimization with proven silicon successes.
• Prior experience in channel modeling and characterization, transceiver noise and timing budget analysis, equalization techniques, and SI knowledge.
• Demonstrated ability in mentoring and coaching engineers early in their careers.
• Demonstrated ability with AI/ML usage and fluency in scripting languages such as PERL/Python.

Benefits

• A choice of medical, dental, and vision plans tailored to meet family healthcare needs and budget.
• Income protection programs if unable to work due to illness or injury, and paid family leave.
• A robust paid time-off program and paid holidays.

For additional information, visit the Benefits Guide on Micron’s careers page.