Principal Digital Verification Engineer
About the role
Renesas is looking for a talented individual for their memory interface products. These memory interface products mainly go to datacenters for AI and cloud computing, providing the highest bandwidth for intensive computing while consuming low power. This exciting role is responsible for the development of digital sections of leading-edge memory data buffer chips for DDR5, DDR6 and beyond.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Responsibilities
- Verification of DDR5 Data Buffer to meet functional and performance specifications.
- Be able to integrate and test on System-level and block level using UVM methodology.
- Participate in feasibility studies.
- Support in developing verification plan based on specifications.
- Support in Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.
- Develop efficient, reusable state-of-the-art verification environments and testbench structures.
- Optimize solutions for key indicators such as reusability, performance and ease of use
- Identify and communicate improvements that may ease verification and/or improve design behavior.
- Support in optimizing UVM based testbench.
- Take ownership of verification environments for assigned blocks, and tools appointed to you as Expert User.
- Drive the Memory interface products verification effort, including defining the verification strategy, developing test plans, coverage, and