Principal Design Engineer
Cadence · Austin, TX · 2 wk ago
EngineeringFull-time
About the role
Cadence is looking for a Design Verification expert with strong subsystem and SOC-level verification experience. This role involves developing SV UVM-based testbenches, mentoring teammates, and independently handling verification of complex modules or significant SOC/subsystem components. You will define verification methodologies, lead metric-driven verification, and collaborate across teams to meet delivery timelines.
Responsibilities
- Develop and architect scalable SV-UVM verification environments from scratch.
- Define verification architecture, strategy, and test plans for subsystem/SOC projects.
- Write, execute, and debug test cases to achieve functional and code coverage goals.
- Mentor junior engineers to develop them into independent verification engineers.
- Follow a systematic, metric-driven verification approach with meticulous attention to quality and completeness.
- Collaborate with cross-functional teams, including architecture, design, and customers, to meet project deadlines.
- Work on ARM-based designs and verify complex modules or subsystems.
- Develop C-based test cases for SOC verification.
Requirements
- Experience in subsystem/SOC-level verification projects.
- In-depth knowledge of SystemVerilog (SV) and UVM.
- Expertise in architecting and developing scalable verification environments.
- Strong experience in verification test plan development and test case coding.
- Proficiency in C-based test case development.
- Strong knowledge of AMBA protocols (AXI, ACE, APB, AHB).
- Good knowledge of at least one of the following protocols: USB, PCIE, Ethernet, DDR, or LPDDR.
- Strong problem-solving skills with a disciplined, methodical approach.
- Ability to work with stakeholders across cross-functional teams (architecture, design, internal/external customers).
- Experience mentoring junior engineers.
- Self-driven, committed, and able to work in a fast-paced project environment.
Desirable Skills
- Prior experience with Cadence tools and flows.
- Familiarity with ARM/CPU architectures.
- Experience with assembly language programming.
- Knowledge of protocols like UART, I2C, SPI, or JTAG.
- Embedded C code development and debug experience.
- Formal verification experience.
- Strong communication, organizational, planning, and presentation skills.
Qualities
- Strong positive attitude and ability to work in a team.
- Self-motivated and willing to take on additional responsibilities.
- Ability to work independently and productively in a dynamic environment.