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Jobs · Art & Creative · California

Physical Design Verification Lead (7264)

TSMC · San Jose, CA · 3 wk ago
Art & Creative$153k–$230k/yrFull-time

Overview of Role

TSMC Technology Inc. is at the forefront of semiconductor innovation, delivering cutting-edge solutions that power the next generation of technology. We are seeking a highly experienced and motivated Physical Design Verification Lead to join our dynamic team, working closely with a key customer on advanced designs in N2P/A14 technology nodes. This is an exceptional opportunity to drive critical verification efforts on state-of-the-art technology nodes and contribute to successful production tapeouts.

Responsibilities

  • Lead and execute end-to-end physical design verification for CPU blocks, culminating in successful production chip tapeouts.
  • Collaborate closely with the STA team to implement Engineering Change Orders (ECOs) for critical timing closure.
  • Perform in-depth analysis and resolution of Signal EM/Noise and Power IR/EM issues.
  • Manage comprehensive analysis and cleanup for all physical verification checks, including DRC, LVS, ERC, and Antenna violations.
  • Achieve final physical verification sign-off across all design metrics.
  • Oversee the implementation of customized Clock Tree Structures (CTS) and advanced Place & Route strategies.
  • Optimize block-level floorplans, meticulously analyzing and ensuring high-quality design partitioning.
  • Provide technical leadership and mentorship to junior engineers.

Minimum Qualifications

  • Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 10-20 years of hands-on experience in physical implementation and verification roles.
  • Demonstrated expertise with major Electronic Design Automation (EDA) tools (e.g., Innovus/ICC2, Calibre) and established design flows.
  • Extensive experience in chip integration and sign-off procedures.
  • Proven experience with advanced technology nodes, specifically TSMC N7 or below.
  • Proficiency in scripting languages, particularly TCL, Perl, and Python, for automation and flow enhancement.
  • Ability and willingness to work full-time at a customer site located in the South Bay area.

Preferred Qualifications

  • Direct experience with TSMC N2 technology nodes.
  • In-depth knowledge of CPU implementation methodologies.
  • Expertise in advanced timing sign-off methodologies and techniques.
  • A strong track record of successful production tapeouts for multi-million gate designs.
  • Prior experience leading physical verification efforts or small teams.

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

  • The world’s leading dedicated semiconductor foundry
  • The technology leader with a strong reputation for manufacturing excellence
  • Advancing semiconductor manufacturing innovations to enable the future of technology

As of the time of this posting, this role typically pays a base salary between $153,000 and $230,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $153,000 and $230,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

Nearest Major Market

San Jose

Nearest Secondary Market

Palo Alto

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