PE Logic Design
About the Role
Rambus, a premier chip and silicon IP provider, is seeking an exceptional Principal Logic Design Engineer to join our Silicon IP (SIP) team in Hillsboro, Oregon. You'll work alongside some of the brightest inventors and engineers globally, developing products that enhance data speed and security. Reporting to the Director of Engineering, you'll contribute as an individual contributor in a fast-growing market with high demand from tier-1 customers, offering ample opportunities for innovation.
Responsibilities
- Own micro-architecture definition and RTL design for critical blocks such as schedulers, command pipelines, coherency/ordering logic, and system interfaces
- Analyze performance, power, and area (PPA) trade-offs, driving design decisions based on quantitative data
- Collaborate with the verification team to shape test plans and improve verification coverage
- Work with the physical design team to address timing, power, and congestion challenges
- Debug regression failures, identify root causes, and provide RTL fixes as needed
- Provide technical support to FAE and AE teams for pre-sales and post-sales customer engagements
Qualifications
- Strong System Verilog/Verilog RTL design expertise
- Experience with Questa/Incisive/VCS simulators
- Python/Perl/TCL scripting experience
- Ability to learn quickly and work independently
- Solid communication and project management skills
- 10+ years of logic design experience (ASIC/FPGA) with a BS in EE, or 8+ years with an MSEE
Definite Plus
- ASIC synthesis, timing constraint, CDC/RDC experience
- UVM Verification experience
- Memory (HBM, LPDDR) expertise
- AMBA AXI or CHI design experience
About Rambus
Rambus is a global leader in memory interface chips and Silicon IP, advancing data center connectivity and addressing memory-processing bottlenecks. With over 30 years of semiconductor experience, we provide high-performance solutions for AI and data-intensive workloads. Our innovative team drives cutting-edge technologies, fostering a culture of fairness, inclusion, and collaboration.
Pay
The US salary range for this full-time position is $127,400 to $236,600. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions.