PD Intern
About the role
We are seeking Physical Design interns to join our team. You will be involved in realizing front-end designs in silicon, improving iteration speed to final signoff, and assisting in developing and running Physical Design flows.
Responsibilities
- Realize front-end designs in silicon
- Assist in developing and running Physical Design flows
- Automate final design checks
- Advise RTL design decisions
- Learn quickly about transformers and other aspects of modern artificial intelligence
Requirements
- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
- Familiarity with high-speed digital logic
- Exposure to ASIC or SoC design concepts
- Familiarity with SystemVerilog, UVM, or Python
- Familiarity with verification work and writing test benches
- Familiarity with physical design flows and tooling
Qualifications
- Able to learn quickly about transformers and other aspects of modern artificial intelligence
- Strong candidates may also have experience with:
- Modern ML and LLM model architectures
- Numerical representations and functions (RTL)
- Clocking and reset schemes (RTL/PD)
- UVM or formal verification experience (DV)
- Ability to program with Python or another scripting language
Skills
- SystemVerilog
- UVM
- Python
Benefits
- 12-week paid internship
- Generous housing support for those relocating
- Daily lunch and dinner in our office
- Based at our office in San Jose (Santana Row)
- CADirect mentorship from industry leaders and world-class engineers
- Opportunity to work on one of the most important problems of our time
Pay
- Details TBD
Schedule
- Details TBD
Contact
If you have any questions, please contact internships@etched.com.
How We’re Different
We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.