Memory Architect

About the role

Tenstorrent is seeking an innovative Memory Architect to join our team. This role is remote or hybrid, based out of North America or South Korea.

Responsibilities

• Define the architecture and micro-architecture specifications for memory and I/O chiplets, focusing on state-of-the-art memory technology for AI and CPU applications.
• Explore and evaluate next-generation memory technologies, analyzing trade-offs across key metrics like bandwidth, latency, and power to develop a strategic roadmap.
• Develop and own a detailed performance and power modeling infrastructure to enable data-driven decisions for high-throughput, low-latency memory architectures.
• Work closely with SoC design/verification, physical design, packaging, and systems engineering teams to ensure seamless integration. Communicate frequently with external partners and customers.

Requirements

• You have a deep understanding of JEDEC standard DRAMs (GDDR, HBM, LPDDR, DDR) and their specifications.
• Experience with 3D-stacking, advanced packaging, custom memory, DFI, die-to-die interfaces, storage, and I/O protocols is a huge plus.
• You bring 10+ years of experience in memory system architecture, scheduling algorithms, and controller architecture exploration and design. Hands-on experience building performance/power simulators or developing memory IPs in HDL is a plus.
• A deep understanding of memory reliability and security is a strong plus.
• You are a collaborative team player with excellent communication skills and a history of mentoring junior engineers.
• A PhD with a focus on computer architecture or a strong research background (or a publication track record) is a strong plus.

Qualifications

• You have a deep understanding of JEDEC standard DRAMs (GDDR, HBM, LPDDR, DDR) and their specifications.
• Experience with 3D-stacking, advanced packaging, custom memory, DFI, die-to-die interfaces, storage, and I/O protocols is a huge plus.
• You bring 10+ years of experience in memory system architecture, scheduling algorithms, and controller architecture exploration and design. Hands-on experience building performance/power simulators or developing memory IPs in HDL is a plus.
• A deep understanding of memory reliability and security is a strong plus.
• You are a collaborative team player with excellent communication skills and a history of mentoring junior engineers.
• A PhD with a focus on computer architecture or a strong research background (or a publication track record) is a strong plus.

Skills

• You have a deep understanding of JEDEC standard DRAMs (GDDR, HBM, LPDDR, DDR) and their specifications.
• Experience with 3D-stacking, advanced packaging, custom memory, DFI, die-to-die interfaces, storage, and I/O protocols is a huge plus.
• You bring 10+ years of experience in memory system architecture, scheduling algorithms, and controller architecture exploration and design. Hands-on experience building performance/power simulators or developing memory IPs in HDL is a plus.
• A deep understanding of memory reliability and security is a strong plus.
• You are a collaborative team player with excellent communication skills and a history of mentoring junior engineers.
• A PhD with a focus on computer architecture or a strong research background (or a publication track record) is a strong plus.

Benefits

• Competitive compensation package and benefits.
• Equal opportunity employer.

Pay

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Schedule

This role is remote or hybrid, based out of North America or South Korea.