Linux Kernel Architect

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms enable leading technology companies to innovate, optimize, and deliver advanced solutions across markets such as artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

Our constant innovation and success are driven by our talented teams, who collaborate to create groundbreaking solutions that impact lives by advancing processor technology.

About the Role

SiFive, the global RISC-V leader, is seeking an experienced Linux kernel software architect to improve and debug the RISC-V Linux kernel, with a focus on high core count server systems. In this role, you will interact directly with the upstream Linux and OpenSBI communities, posting and reviewing patches. You will debug challenging problems in collaboration with our system software and validation teams on SiFive designs running in emulation. Additionally, you will work with hardware architects and engineers—both within SiFive and at RISC-V International—to enhance core and system designs.

Responsibilities

• Develop and debug the RISC-V Linux kernel, particularly for high core count server systems.
• Engage with the upstream Linux and OpenSBI communities by posting and reviewing patches.
• Debug complex software and hardware issues in CPUs and SoCs.
• Collaborate with system software and validation teams on emulation platforms.
• Work with hardware architects and engineers to refine core and system designs.

Requirements

• Experience working on concurrency-sensitive code in the upstream Linux kernel, with a proven track record of writing and reviewing patches on public mailing lists.
• Experience debugging challenging software and hardware bugs in CPUs and SoCs.
• Experience working with CPU architects and RTL engineers.
• Experience developing and debugging Linux on FPGA and emulation platforms.
• Experience with hypervisors and virtualization.
• Familiarity with the RISC-V architecture.

Preferred Qualifications

• Familiarity with silicon design issues and challenges.
• Familiarity with microarchitectural side-channel attacks and mitigations.
• Familiarity with debugging systems via hardware debuggers.
• Familiarity with Devicetree, ACPI, and UEFI.
• Familiarity with Rust.

Pay

SiFive offers a market-based pay structure that varies by location. The base pay range is a guideline reflecting the cost of labor in the U.S. geographic market based on the role’s location. Pay within these ranges depends on job-related knowledge, skills, and relevant work experience. The starting salary will vary based on qualifications, skill level, competencies, and work location.

Base Pay Range: (Provided as a guideline; actual range may vary.)

Benefits

In addition to base pay, this role may be eligible for variable/incentive compensation and/or equity. The position also includes a comprehensive, competitive benefits package covering healthcare, retirement plans, paid time off, and more.