Linux Kernel Architect

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms enable leading technology companies to innovate, optimize, and deliver advanced solutions across markets such as artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

Our constant innovation and success are driven by our talented teams, who collaborate to develop groundbreaking ideas and solutions that impact people's lives—making the world a better place, one processor at a time.

About the Role

Do you want to be part of the RISC-V revolution? RISC-V and SiFive are redefining computing platforms for the 21st century. As a Linux kernel software architect at SiFive, you’ll improve and debug the RISC-V Linux kernel, with a focus on high core-count server systems. You’ll engage directly with the upstream Linux and OpenSBI communities, posting and reviewing patches, and debug challenging problems in collaboration with our system software and validation teams on SiFive designs running in emulation. Additionally, you’ll work with hardware architects and engineers—both within SiFive and at RISC-V International—to enhance core and system designs.

Responsibilities

• Develop and debug the RISC-V Linux kernel, particularly for high core-count server systems.
• Interact with upstream Linux and OpenSBI communities by posting and reviewing patches.
• Debug complex software and hardware issues in CPUs and SoCs.
• Collaborate with system software and validation teams on SiFive designs in emulation.
• Work with hardware architects and engineers to improve core and system designs.

Requirements

• Experience working on concurrency-sensitive code in the upstream Linux kernel, with a track record of writing and reviewing patches on public mailing lists.
• Experience debugging challenging software and hardware bugs in CPUs and SoCs.
• Experience working with CPU architects and RTL engineers.
• Experience developing and debugging Linux on FPGA and emulation platforms.
• Experience with hypervisors and virtualization.
• Familiarity with the RISC-V architecture.

Preferred Qualifications

• Familiarity with silicon design issues and challenges.
• Familiarity with microarchitectural side-channel attacks and mitigations.
• Familiarity with debugging systems via hardware debuggers.
• Familiarity with Devicetree, ACPI, and UEFI.
• Familiarity with Rust.

Pay & Benefits

SiFive offers a market-based pay structure that varies by location. The base pay range is a guideline, and compensation reflects the cost of labor in the U.S. geographic market based on the role’s location. Pay within these ranges depends on job-related knowledge, skills, and relevant work experience. For candidates who receive an offer, the starting salary will vary based on qualifications, skill level, competencies, and work location.

Base Pay Range: (Provided as a guideline; specific range not disclosed in the posting.)

In addition to base pay, this role may be eligible for variable/incentive compensation and/or equity. The position also includes a comprehensive, competitive benefits package covering healthcare, retirement plans, paid time off, and more.