Lead Firmware Engineer

Contract position for a US Citizen with an active security clearance. Potential pay range is $100+ per hour based on education and skill set.

About the role

Our client’s System Development Division (SDD) is focused on delivering National Defense capabilities by driving mission-focused strategies to develop advanced technology systems enabling enduring products and solutions. The division delivers sustainable, reliable, and cost-efficient capabilities that function in operationally relevant environments and timeframes. The team considers the entire lifecycle of the solution, from conceptualization and architecting through development to deployment, leveraging novel technologies to deliver first-of-a-kind systems.

We are seeking a Lead Firmware Engineer with a strong understanding of digital signal processing as applicable to radar to implement complex system algorithms and interfaces in FPGAs for Radar and EW systems. Projects span all levels of maturity from initial concept generation through design, prototype, development, test, and transition to production. In this role, you will implement, test, and verify designs through simulation and lab test, working with multidisciplinary teams to support development and test activities.

Responsibilities

• Map system-level radar requirements and algorithms to efficient FPGA architectures
• Design and implement radar signal processing algorithms in FPGAs (pulse compression, FFT processing, CFAR detection, beamforming, Doppler processing)
• Develop high-throughput, low-latency processing architectures for real-time radar applications
• Implement waveform generation, digital down-conversion, and channelization in FPGA fabric
• Design and optimize pipelined arithmetic units and custom DSP blocks for radar processing
• Interface FPGAs with high-speed ADCs/DACs for radar RF front-end integration
• Validate designs with simulation and verification techniques before hardware integration
• Participate in FPGA development process improvement
• Support full life cycle of development and integration of FPGA firmware into hardware systems
• Create and maintain design documentation and test plans
• Deliver technical briefings to a range of internal and external stakeholders
• Coordinate with program managers and technical leads to manage task schedules and budgets
• Provide mentorship to more junior engineers to accelerate their technical and professional development
• Build and maintain high-performing and empowered technical teams

Requirements

• Bachelor's degree and at least 7 years of applicable experience, a Master's degree and at least 5 years of applicable experience, or PhD and at least 2 years of applicable experience (equivalent experience will be considered)
• Experience with FPGA and SoC design entry using Verilog or VHDL
• Experience implementing digital signal processing techniques, filter design, FFT/DFT, fixed-point optimization
• Experience with design flow for Xilinx and/or Intel FPGAs
• Experience with simulation tools such as ModelSim/Questa, VCS, or Incisive
• Demonstrated desire to successfully pursue new challenges, improve and broaden technical skills, seek greater responsibilities, and increase individual value to the organization
• Capable of effectively working in a team environment, often under tight deadlines
• Active Security Clearance at the Secret or Top Secret level
• Ability to obtain a Top Secret (TS) security clearance (U.S. citizenship required)

Skills

• Proficient with Xilinx or Altera SoC platforms
• Proficient with FPGA or ASIC RTL design entry
• Strong background and experience with industry best practices and version control
• Proficient with complex timing closure
• Experience with Matlab, Python, or C/C++
• Experience with interfacing to high speed DACs and ADCs
• Knowledge of pulse compression, Doppler processing, beamforming, detection algorithms
• Previous experience with RFSoC or Analog Devices ADC/DAC
• Understanding of RF Systems, specifically radar or EW
• Strong interpersonal, communication, and technical skills
• Self-motivated, detail-oriented, and demonstrated ability to effectively communicate with all levels of management and individual contributors

Pay

Potential pay range is $100+ per hour based on education and skill set.