Lead, Electrical Engineering - FPGA Verification Engineer

About the role

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do. L3Harris is the Trusted Disruptor in defense tech. With customers’ mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security. This position is located in Palm Bay, FL (Job Code: 44204).

Responsibilities

• Execute and contribute to the FPGA verification plan
• Architect UVM test cases for individual blocks or sub blocks within an FPGA
• Develop reusable agents, top level testbench modules and environments
• Define and implement functional coverage model based upon DUT requirements and close code coverage.
• Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements.
• Strong understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
• Work independently or with limited guidance to develop test bench solutions.
• Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions.
• Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust.
• Ability to obtain US government clearance.

Qualifications

Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related experience. Ability to obtain US government clearance.

Skills

• Experience with and understanding of Altera or Xilinx / AMD FPGA architectures
• Experience with high speed serial protocols (PCI Express, SRIO, Ethernet)
• Experience designing 10G Ethernet based Network Interface Designs
• Experience in network protocols including IPv6 and UDP
• Experience with SoC (Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, Zynq UltraScale)
• Experience with VHDL
• Experience in ASIC / FPGA verification using C/C++ and/or System Verilog
• Experience with DO-254 air worthiness certification
• Experience with building and setting up scalable simulation/verification environments
• Experience with Vivado and/or Quartus tool suite
• Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
• Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
• Proficient in scripting languages: bash/csh, Perl,