Lead Design Engineer
Cadence · Cary, NC · 2 mo ago
EngineeringFull-time
Job Responsibility
- Implement, verify, timing closure to tape out Palladium and Protium SOCs.
- Work on RTL synthesis and floorplanning.
- Build clock trees and perform optimizations.
- Close timing, IR drop and physical verification.
- Review and Document designs for taping out.
- Interface with Front End RTL design teams and Back End Verification teams.
Position Requirements/Qualifications
- BS degree in Electrical Engineering with a minimum of 5 years of experience OR MS with a minimum of 3 years of experience.
- Experience with Cadence tools such as Innovus, Tempus, QRC, Voltus and Pegasus.
- Experience with advanced technologies like 5nm, 3ns and 2nm nodes.
- Experience using Linux servers, Script development using Shell/Perl/TCL/Python.
- Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe, etc.