Lead Board Hardware Development Engineer

About the role

AMD's Adaptive and Embedded Computing Group (AECG) is seeking a Principal FPGA/Adaptive SoC System Architect to provide technical leadership in the architecture, design, development, integration, and validation of complex board-level products utilizing AMD Adaptive SoCs, FPGAs, embedded processors, and advanced system technologies. In this role, you will be responsible for defining technical direction, driving system architecture decisions, leading cross-functional engineering efforts, and delivering complete hardware and embedded solutions from concept through production. You will work across FPGA development, board design, embedded software, firmware, system integration, manufacturing, and customer-facing organizations to ensure successful product execution and engineering excellence.

Responsibilities

• Lead the architecture, design, development, and validation of complex board products utilizing AMD Adaptive SoCs, FPGAs, embedded processors, and advanced system technologies.
• Define technical direction and drive FPGA/SoC subsystem architectures, including high-speed interfaces, embedded processing, hardware acceleration, and system integration solutions.
• Lead the integration of FPGA, hardware, embedded software, firmware, and system-level components to deliver complete platforms and products.
• Drive board bring-up strategy, system debug, DVT execution, failure analysis, root-cause investigations, and corrective actions across multiple programs.
• Provide technical oversight for component selection, schematic review, signal integrity considerations, power architecture, BOM optimization, and product lifecycle management.
• Serve as a technical authority for board and FPGA design reviews, influencing engineering decisions across organizations and ensuring adherence to engineering excellence standards.
• Lead resolution of complex technical issues involving customers, manufacturing partners, and cross-functional stakeholders, driving solutions from concept through production.
• Drive continuous improvement initiatives in design methodologies, automation, validation efficiency, manufacturing readiness, and product quality.

Qualifications

The ideal candidate has a proven track record of architecting and delivering complex FPGA or Adaptive SoC-based products from concept through volume production. They possess deep expertise in board-level hardware architecture, FPGA design, embedded systems, system integration, and product development. They should be a strong technical leader with excellent communication skills, capable of influencing engineering direction across organizations, mentoring engineering teams, and driving resolution of the most challenging technical issues.

Preferred Experience

• Deep expertise in AMD Adaptive SoCs, FPGA architectures, embedded processors, and system-level design.
• Extensive experience with board-level hardware architecture, schematic review, signal integrity, power delivery design, and component selection.
• Proven experience architecting and integrating complete hardware, FPGA, embedded software, and firmware solutions.
• Strong understanding of high-speed interfaces, embedded processing, hardware acceleration, and system integration methodologies.
• Demonstrated success in board bring-up, DVT execution, system debug, failure analysis, and root-cause investigations.
• Experience supporting products through manufacturing, production ramp, and lifecycle management.
• Proven track record of leading complex technical programs and delivering products from concept through volume production.
• Strong technical leadership, mentoring, and cross-functional collaboration skills.
• Experience driving automation, validation efficiency, and continuous improvement initiatives.
• 15+ years of demonstrated experience in SoC design, board hardware architecture, system integration, and product development.

Academic Credentials

Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or related field.

Schedule

This is a 5 Day per week onsite role in San Jose. This role is not eligible for visa sponsorship.