Junior FPGA Engineer

Responsibilities

• Aid in the development and maintenance of synthesizable SystemVerilog code for FPGA-based applications.
• Maintain comprehensive testbenches to verify hardware functionality and performance.
• Execute simulations, debug logic issues, and analyze waveform data to ensure design correctness.
• Develop Python-based automation tools and test scripts to improve validation and verification workflows.
• Support hardware deployments by analyzing real-time system data to identify design issues, timing concerns, and edge cases.
• Document design implementations, verification results, and testing procedures.
• Collaborate closely with senior engineers throughout the hardware development lifecycle.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 1-3 years of relevant experience, including internships, research projects, or professional experience.
• Knowledge of SystemVerilog or Verilog for hardware design and verification.
• Experience using simulation and debugging tools such as ModelSim, Questa, or Vivado Simulator.
• Proficiency with Python for automation, scripting, and data analysis.
• Understanding of digital design fundamentals including synchronous logic, state machines, clock domain crossing, and FIFO architectures.
• Familiarity with FPGA development environments such as AMD/Xilinx Vivado or Intel Quartus is a plus.
• Interest in financial technology, quantitative trading, or performance-critical systems is preferred.

Benefits

• Competitive base salary and discretionary bonus.
• Comprehensive health, dental, and vision coverage.
• Retail savings plan with company support.
• Professional development and mentorship opportunities.
• Exposure to cutting-edge FPGA technology and low-latency systems.