IP Enablement Application Engineer
About Intel Foundry Services
Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.
Position Overview
The Aerospace, Defense & Government (ADG) IP Enablement Application Engineer provides comprehensive technical support to Intel Foundry Services customers on IP integration challenges. This dynamic role requires a versatile engineer who engages with IP design teams and internal/external customers across all phases of IP development - from architecture through post-silicon validation and debug. The position embodies customer obsession by quickly resolving issues and providing hands-on debug across all design domains.
Key Responsibilities
- Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges remotely or onsite
- Fully own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process
- Drive resolution of customer issues related to IP collaterals generation, logic design verification, IP release, and integration in SoC environments
- Cross-Functional Collaboration & IP Development
- Work with cross-functional teams to develop SoC and IP integration methodologies and best practices
- Engage with IP development teams to ensure all IP collaterals are generated and provided according to customer requirements and industry standards
- Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution
- Customer Requirements & Training
- Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests
- Create comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug
- Create application notes, documentation, and deliver technical training presentations to customers and internal teams
- Quality & Process Improvement
- Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape-outs
- Support debugging and problem-solving activities in collaborative team environments
- Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction
Qualifications
- US Citizenship required
- Ability to obtain a US Government Security Clearance
- Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study
- 2+ years of experience in SOC IP Integration
- 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog
- Experience in ASIC or SoC development
What We Offer
- Opportunity to work with cutting-edge memory technologies for aerospace, defense, and government applications
- Direct customer engagement and technical leadership in advanced memory design
- Access to Intel's most advanced foundry technologies and comprehensive memory IP portfolio
- Competitive compensation
- Professional development in memory design methodologies and foundry services
- Direct impact on national security through advanced memory semiconductor solutions
Additional Information
- Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices
- We do not charge any fees during our hiring process
- Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment