IP Enablement Application Engineer

About the role

The Aerospace, Defense & Government (ADG) IP Enablement Application Engineer at Intel Foundry Services provides comprehensive technical support to customers on IP integration challenges. This role involves engaging with IP design teams and customers to solve complex challenges, both remotely and on-site.

Responsibilities

• Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges.
• Own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process.
• Drive resolution of customer issues related to IP collateral generation, logic design verification, IP release, and integration in SoC environments.
• Collaborate with cross-functional teams to develop SoC and IP integration methodologies and best practices.
• Engage with IP development teams to ensure all IP collateral is generated and provided according to customer requirements and industry standards.
• Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution.
• Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests.
• Create comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug.
• Create application notes, documentation, and deliver technical training presentations to customers and internal teams.
• Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape-outs.
• Support debugging and problem-solving activities in collaborative team environments.
• Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction.

Qualifications

• US Citizenship required.
• Ability to obtain a US Government Security Clearance.
• Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study.
• 2+ years of experience in SOC IP Integration.
• 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog.
• Experience in ASIC or SoC development.

Benefits

Intel offers a total compensation package that includes competitive pay, stock bonuses, and benefit programs such as health, retirement, and vacation. Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.