Infinity Fabric Senior Staff Verification Engineer

About the role

The Infinity Fabric transport layer verification team at AMD is seeking a senior pre-silicon verification engineer to contribute to the verification of configurable switches and die-to-die interconnects. This role is crucial for ensuring the success of new AMD products across various markets including Client, Server, Graphics, and Semi-Custom.

Responsibilities

• Define and drive verification strategy for complex GPU features or subsystems with cross-project and cross-product impact
• Partner with architects, RTL, and firmware leads to influence feature definition, implementation approach, and verification readiness early in the design cycle
• Own verification planning and execution for technically critical areas, including risk identification, trade-off analysis, and mitigation strategies
• Lead development of robust, scalable verification environments and methodologies, including directed and constrained-random testing using SystemVerilog and UVM
• Solve complex, ambiguous verification challenges, often requiring new approaches or extensions to existing processes and infrastructure
• Analyze functional and code coverage at a system level, driving coverage closure strategies that balance quality, schedule, and compute efficiency
• Drive improvements to verification processes, tools, and workflows that increase productivity, quality, or execution efficiency across teams
• Coordinate and technically lead small verification efforts within larger programs, aligning stakeholders and delivering on shared objectives
• Mentor and coach junior and senior engineers, acting as a go-to technical resource and influencing best practices across the organization

Requirements

• Proficient in IP level ASIC verification
• Proficient in debugging firmware and RTL code using simulation tools
• Proficient in using UVM testbenches and working in Linux and Windows environments
• Experienced with Verilog, System Verilog, C, and C++
• Developing UVM based verification frameworks and testbenches, processes and flows
• Automating workflows in a distributed compute environment
• Exposure to simulation profiling, efficiency improvement, acceleration, and HLS tools/process
• Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
• Good working knowledge of SystemC and TLM with some related experience
• Scripting language experience: Perl, Ruby, Makefile, shell preferred
• Experience working with complex designs (not just I2C and other similar designs)

Qualifications

• BS or MS degree in Electrical Engineering, Computer Engineering, or Computer Science preferred

Benefits

AMD offers competitive benefits including health insurance, retirement plans, paid time off, and more. For details, please refer to AMD's benefits page.