IC Package FEA Engineer

Position Overview

At Lumilens, we are redefining the optical layer that powers tomorrow’s AI and high-performance computing. We are seeking an experienced IC Package Mechanical FEA Engineer to help drive the next generation of high-performance packaging solutions for advanced ASICs.

You will join a globally distributed R&D organization developing mechanical designs that enable cutting-edge systems for AI, networking, HPC, and 5G infrastructure. You will work hands-on with emerging packaging and photonic-integration technologies, including co-packaged fiber-optic transceivers, novel optical connectors, and complex chip-stacking approaches such as 3DIC, hybrid copper bonding, and heterogeneous integration.

Requirements

• Bachelor’s in Mechanical Engineering (or related field) with 12+ years FEA experience, Master’s with 10+, or PhD with 7+
• Deep expertise in advanced packaging technologies, including flip-chip, FOWLP, 2.5D/3D integration, chiplet architectures, and TSVs
• Strong understanding of materials behavior across polymers, metals, ceramics, and their thermo-mechanical interactions
• Familiarity with semiconductor packaging processes such as die attach, underfill, molding, bumping, and reflow
• Proficiency with FEA tools, including Ansys Classic/Mechanical and Abaqus
• Ability to interpret and correlate complex simulation results using first-principles mechanical engineering concepts
• Demonstrated experience calibrating models with empirical data, including hands-on mechanical testing and metrology
• Proven capability in developing and running lab-level experiments to validate simulations and identify root causes
• Strong judgment in balancing manufacturing constraints, reliability requirements, and performance needs
• Excellent self-management, organizational discipline, and ability to thrive in a fast-moving environment
• Comfortable collaborating with global, cross-functional engineering teams and external vendors
• Strong presentation, communication, and technical documentation skills

Responsibilities

Perform FEA simulations to evaluate stress, strain, warpage, delamination, thermal cycling, and reliability risks across advanced package architectures (flip-chip, fan-out, 2.5D/3D IC, chiplet-based, TSVs).

Define simulation requirements, analyze results, and deliver actionable design and process recommendations.

Support technology road mapping by assessing new materials, interconnect structures, and process flows from a thermo-mechanical reliability perspective.

Lead DOE studies and sensitivity analyses to identify key reliability and performance drivers.

Collaborate with cross-functional teams (design, photonics, manufacturing, reliability, vendors) to ensure robust, scalable package architectures.