High-Speed Interface Validation Engineer, Post Silicon Validation

About the role

The MLA Post-Silicon Validation team owns validation of AWS's next-generation ML training accelerators from first silicon through production deployment in AWS data centers. We sit at the intersection of hardware, firmware, and ML software — ensuring every layer of the stack performs, scales, and meets the quality bar.

Responsibilities

• Validate high-speed interfaces (HBM, PCIe, UCIe, custom SerDes) end-to-end from PHY training through sustained traffic
• Perform electrical characterization: eye diagrams, jitter analysis, voltage margin, and equalization tuning
• Execute protocol-level compliance testing and interoperability validation against industry specifications
• Stress-test links across PVT (Process, Voltage, Temperature) corners and aging conditions
• Debug link training failures, bit errors, and performance degradation using lab instrumentation and silicon debug features
• Collaborate with PHY design teams on equalization optimization, margin improvement, and silicon feedback

Requirements

• 3+ years of non-internship professional software development experience
• 2+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
• Experience with RF measurement equipment, including: power meters, spectrum analyzers, vector signal generators, network analyzers, oscilloscopes
• Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or experience in test setup automation using MATLAB, Python, or Pearl
• 3+ years of hands-on experience validating or characterizing at least one high-speed interface technology (HBM, PCIe, DDR, SerDes, or UCIe)
• Proficiency with signal integrity measurement techniques: eye diagram analysis, jitter decomposition, and voltage/timing margin assessment
• Familiarity with at least one interface specification standard (JEDEC HBM/DDR, PCI-SIG PCIe, or UCIe consortium)

Qualifications

• Basic Qualifications: 3+ years of non-internship professional software development experience, 2+ years of non-internship design or architecture experience, Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or relevant experience, 3+ years of hands-on experience validating or characterizing at least one high-speed interface technology, proficiency with signal integrity measurement techniques, familiarity with at least one interface specification standard
• Preferred Qualifications: 3+ years of full software development life cycle experience, knowledge of forward error correction (FEC) and link reliability metrics (BER, MTBF), PCB and package-level signal integrity awareness, experience with multi-die or chiplet architectures and die-to-die interconnect validation, familiarity with equalization techniques (CTLE, DFE, FFE) and adaptive tuning

Skills

Basic skills required for the role include proficiency with signal integrity measurement techniques, familiarity with at least one interface specification standard, and experience with RF measurement equipment.

Benefits

Amazon offers comprehensive benefits including health insurance, 401(k) matching, paid time off, and parental leave. For more information, visit here.

Pay

Base salary range for this position is $143,700.00 - $194,400.00 USD annually.

Schedule

Not specified.