Post-Silicon Validation and Methodology Engineer

About the role

NVIDIA's Silicon Co-Design Group seeks a hardware engineer to build methods, test infrastructure, and coverage strategies that find issues before software is production-ready. This role involves working across architecture, build, firmware, and software teams to define requirements for power management and clocking features, driving coverage from pre-silicon through production. The engineer will also build and deploy AI-assisted lab workflows, lead root-cause analysis on the hardest HW/SW interaction issues, and redesign processes to improve bring-up velocity and quality.

Responsibilities

• Own bring-up, validation, qualification, tuning, and productization plans for next-generation silicon.
• Partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, then drive coverage from pre-silicon through production.
• Build and deploy AI-assisted lab workflows to automate bring-up telemetry and silicon measurement data evaluation, providing anomaly detection on regression results and debug-triage tooling.
• Build the test infrastructure, characterization methodologies, and bring-up playbooks that shift post-silicon coverage left and raise velocity across programs.
• Lead root-cause analysis on the hardest HW/SW interaction issues, with the measurement field, instrumentation judgment, and hypothesis rigor to close them under schedule pressure.
• Identify where current processes break and redesign them: bring-up sequencing, debug forums, regression frameworks, and the lab metrics that tell us whether we are actually improving.

Requirements

• BS or MS in Electrical or Computer Engineering (or equivalent experience), plus 5+ years in silicon bring-up, validation, debug, or productization.
• Deep fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and control systems — and the ability to reason across the HW/SW boundary under real lab constraints.
• Hands-on lab proficiency: oscilloscopes, logic analyzers, power analyzers, and the instinct to know which instrument answers which question during a bring-up.
• Strong programming and scripting proficiency: Python, C/C++; experience building lab automation or test infrastructure that other specialists adopt and depend on — not just personal scripts.
• Proficiency in the use of AI tools to accelerate silicon validation work — automated analysis of bring-up logs, regression data, or lab instrumentation output; anomaly detection on silicon measurement datasets; or LLM-assisted debug triage.

Qualifications

• Hardware proof of crafting: debug infrastructure you built in the lab, characterization methodologies adopted across programs, build DFT feature specs or in-system test suites you developed, or margin test flows that caught issues before production.
• Experience crafting or scaling in-system test and DFT features for production silicon, with familiarity with fault models, DPPM, and RAS.
• Concrete examples of redesigning how a team debugs in the lab — faster triage, smarter hypothesis trees, automated measurement reporting — and the resulting increase in bring-up velocity or quality.

Skills

• AI tools for silicon validation work.
• Lab automation and test infrastructure development.
• Debugging and root-cause analysis.
• Bring-up and productization planning.
• Collaboration across multiple engineering disciplines.

Benefits

Competitive salaries and a comprehensive benefits package are offered. NVIDIA is widely considered one of the technology world’s most desirable employers. For more information about our benefits, visit www.nvidiabenefits.com/.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $136,000 - $218,500.

Schedule

The posting is for an existing vacancy. Applications will be accepted at least until August 29, 2026.

Company Information

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. We highly value diversity in our current and future employees and do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.