Hardware Test Engineer
About the role
Develop and run package-level test — socket-based bring-up and validation of packaged units: power-up, interface/interconnect continuity, and functional/parametric checks against spec (board↔package interface, not ATE silicon device test)
Develop and run board-level test — functional, structural (boundary scan/JTAG), in-circuit, and bring-up validation for accelerator boards and system hardware
Build out system-level test — bring up and validate assembled accelerator systems against spec, including functional, stress, and burn-in flows
Design and validate test hardware and fixtures — sockets, connectors, load boards, and board/system fixtures for high-speed and high-current test
Drive test coverage, yield analysis, and test-time/cost reduction across the product lifecycle
Lead new-product test bring-up; resolve test escapes, yield excursions, and hardware failures with data-driven root cause
Run characterization and correlation across levels — package ↔ board ↔ system, and bench ↔ production test
Define test specs, limits, and guardbands with design, product, packaging, and reliability engineering
Transfer and sustain test programs at OSAT/CM and manufacturing partners through ramp to high volume
Use and develop AI-assisted tool flows to accelerate test development, debug, and yield analysis
What we're looking for
BS/MS in Electrical/Computer Engineering or equivalent plus 5+ years in package/board/system-level hardware test engineering
Hands-on test experience across at least two of package-level, board-level, and system-level test — with the ability to own the others
Package and board test hardware experience (sockets, connectors, load boards, fixtures) and the signal/power integrity that comes with high-speed, high-current test
Lab bring-up and debug skills: oscilloscopes, logic and protocol analyzers, power and thermal instrumentation
Data analysis and statistical skills for yield, characterization, and correlation work
(Optional) High-speed I/O / SerDes, DDR/HBM, RF, or high-current/power-device test; structural test (boundary scan); scripting/automation (Python, C++); system burn-in and reliability test; OSAT/CM partner management
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal Opportunity
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$230,000 - $290,000 USD