FPGA Hardware Engineer - DO-254 Avionics

About the role

This role is focused on RTL design, simulation, hardware verification, test procedure development, integration support, and DO-254 DAL-A certification artifacts for Airborne Electronic Hardware.

Responsibilities

• Capture, decompose, and trace requirements for FPGA/ASIC/SoPC hardware development.
• Create RTL design code and simulations using VHDL, Verilog, SystemVerilog, and/or UVM.
• Create hardware test cases, test procedures, integration plans, and verification documentation.
• Define verification strategies using on-hardware verification environments, test frameworks, and test tools.
• Create DO-254 DAL-A certification artifacts for Airborne Electronic Hardware.
• Perform FPGA/ASIC/SoPC verification through inspection, analysis, simulation, and hardware test methods.
• Communicate with engineering, program management, leadership, and customer stakeholders.
• Recommend tools and process improvements for ASIC/FPGA design flows.
• Participate in peer reviews throughout the product lifecycle.
• Support FAA SOI audit activities when required.

Requirements

• STEM degree with at least 5 years of relevant experience, or advanced STEM degree with at least 3 years of relevant experience.
• Experience writing RTL and test benches using VHDL, Verilog, SystemVerilog, and/or UVM.
• Experience with DO-254 processes and design assurance activities for ASIC, FPGA, and/or SoPC development.
• Experience creating DO-254 DAL-A certification artifacts for Airborne Electronic Hardware.
• Experience with hardware verification methods including simulation, analysis, inspection, and test.
• Experience with Linux or Unix environments and scripting.
• Experience with C/C++, Python, and/or Perl.
• Experience using FPGA tools such as QuestaSim, Vivado, Libero, Synplify Pro, or similar.
• Experience with data interfaces such as PCIe, DDR, I2C, Ethernet, CDN, and/or ARINC-429.
• Aerospace, aviation, or avionics domain experience.

Qualifications

• STEM degree with at least 5 years of relevant experience, or advanced STEM degree with at least 3 years of relevant experience.
• Advanced STEM degree with at least 3 years of relevant experience.

Skills

• Familiarity with constrained random verification, functional coverage, code coverage, UVM, and SystemVerilog.
• Experience participating in FAA SOI audits.
• Experience mentoring or guiding other engineers.
• Experience improving ASIC/FPGA design tools, flows, or verification practices.

Benefits

N/A

Pay

$70,000 to $100,000 USD per year for FTE, or $145,600 – $156,000 per year for C2C

Schedule

On-site only

Application Instructions

N/A