Jobs · Management · California

FPGA Functional Safety Engineers, Sensors

Tensor Auto · San Jose, CA · 3 days ago
Management$75k–$300k/yrFull-time

Responsibilities

  • Conduct safety analysis for FPGA subsystems to ensure compliance with functional safety standards.
  • Develop and maintain comprehensive functional safety documentation, including V-model requirements and FMEDA analysis.
  • Design, implement, and integrate features within the FPGA stack, focusing on safety and reliability.
  • Enhance and uphold FPGA development workflows to address functional safety requirements.
  • Engage in FPGA development tasks, including RTL design, simulation, high-speed digital circuit design, DSP algorithm implementation, verification, synthesis, and timing analysis.
  • Create automation scripts to streamline repetitive tasks, improving workflow efficiency and reliability.
  • Perform hands-on debugging and troubleshooting during board bring-up using laboratory equipment.

Qualifications

  • Bachelor's in Computer Engineering, Electrical Engineering, or related field.
  • Minimum of 5 years of experience in FPGA development, including HDL coding, simulation, test bench creation, synthesis, and timing closure.
  • Solid understanding of safety principles and industry standards like ISO 26262 or ASIL-B.
  • Advanced knowledge of RTL design using Verilog and SystemVerilog.
  • Proficiency in scripting languages such as Python, TCL, Perl, or Bash.
  • Hands-on experience with embedded systems involving CPUs and FPGA platforms such as Xilinx Zynq devices.
  • Experience with Xilinx and/or Intel FPGA toolchain.
  • Experience with DSP algorithm implementations in FPGAs.
  • Knowledge of processor architectures and communication protocols, including DDR4, AXI, I2C, UART, SPI, and Ethernet.

Preferences

  • Familiarity with High-Level Synthesis (HLS) tools and methodologies.
  • Experience with version control systems, particularly Git, using best practices.
  • Proficiency in programming languages like C or C++.
  • Knowledge of advanced verification methodologies, such as UVM (Universal Verification Methodology).

Pay

Salary Range: $75k—$300k USD

Schedule

Not specified

Benefits

Preferable but not required

Skills

Not specified

Benefits

Preferable but not required

Schedule

Not specified

Location

  • San Jose, California, US
  • Barcelona, Catalonia, Spain

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