FPGA/ASIC Design Engineer (Silicon Engineering)

Responsibilities

• Design ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks using Verilog/SystemVerilog
• Optimize designs for power, performance and area
• Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture, design partitioning, and collaboration with backend/implementation teams, and assist in lab bring-up and validation
• Contribute to continual improvements to our designs by building physical and digital tools to analyze data collected on orbit and in the lab
• Engage in high-level architectural design for test systems to support FPGA/ASIC validation, generational interoperability, and integration with DSP/communications subsystems for comprehensive lab and on-orbit verification.
• Collaborate with software engineers in developing production software for your designs

BASIC QUALIFICATIONS

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics
• 1+ years of experience in RTL Design using SystemVerilog, Verilog or VHDL

PREFERRED SKILLS AND EXPERIENCE

• ASIC/FPGA system integration experience
• Proficiency in Python, C/C++, and Bash
• Experience in designing DSP, digital communication system datapath blocks, and/or modem design
• Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)
• Experience and understanding of AXI/AHB/APB protocols
• Strong foundation in electrical engineering fundamentals
• Experience debugging complex PCBs containing Microprocessors and FPGAs in the lab using equipment such as oscilloscopes and spectrum analyzers
• Able to work in a dynamic environment with changing needs and requirements
• Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
• Demonstrated ability to work in a highly cross-functional role
• Enjoys being challenged and learning new skills
• Master’s in Electrical/Computer Engineering or related field

ADDITIONAL REQUIREMENTS

• Ability to work extended hours or weekends as needed for mission critical deadlines

COMPENSATION & BENEFITS

Pay range:

• ASIC Design Engineer/Level I: $125,000.00 - $145,000.00/per year
• ASIC Design Engineer/Level II: $145,000.00 - $195,000.00/per year

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.

ITAR REQUIREMENTS:

• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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