Emulation Engineer

Key Responsibilities

• Maintaining hardware emulation system in full operational condition
• Defining, documenting, developing and executing emulation process for multiple projects
• Integrating hardware emulation system to different software platform
• Triaging regressions, debugging RTL designs in Verilog and SystemVerilog
• Help improve and refine emulation process, methodology, and metrics

Experience Requirements / Qualifications

• 3+ years’ experience on SoC, system on chip, IPs integration or IP RTL design
• Familiar with Verilog & SystemVerilog programming
• Strong emulation experience working on available platforms such as; Palladium, Veloce, or Zebu, as well as experience with compilation, debug, performance, and throughput optimization
• Knowledge of ARM CHI-E/ACE/AXI bus protocol
• Experience of Emulator for “SoC + Software” validation
• Siemens Veloce experience is a plus
• Strong skill on signal waveform debugging, such as Visualization tools

About Arteris

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.