Jobs · Information Technology · California

Distinguished Technologist - AI Model Performance Architect

HP · Palo Alto, CA · 1 mo ago
On-siteInformation TechnologyFull-time

Responsibilities

  • Analyze system bandwidth, latency, and compute bottlenecks
  • Model performance across CPU/GPU/NPU for AI workloads
  • Simulate workload execution (PnP tradeoffs, resource contention)
  • Optimize model execution (initialization time, caching, KV reuse)
  • Drive HW/SW co-design (memory, caching, scheduling)
  • Partner with ML teams to align model structure with system architecture
  • Leverages recognized technical and business expertise to define long-term vision and strategy for electrical hardware design and development
  • Communicates strategy and technology roadmaps to executive staff, industry partners and customers
  • Develops technology roadmaps for electrical/hardware engineering team; identifies gaps and solutions for future growth
  • Provides innovative solutions and integrates advanced technologies, theories, or techniques with a significant impact across disciplines, championing large projects for long-range goals
  • Works closely with product management, engineering stakeholders from related departments and empowers the teams to deliver outstanding and impactful results
  • Initiates industry-leading research and development, serving as a recognized lead authority internally and externally
  • Mentors and guides less-experienced staff members to set an example of electrical hardware design and development, innovation, and excellence
  • Participates in and provides input on process for selection of future technical leaders

Requirements

Recommended Four-year or Graduate Degree in Electrical Engineering, or any other related discipline or commensurate work experience or demonstrated competence.

Typically has 12+ years of work experience, preferably in electrical design and tools, software packages, architecture of electronic hardware, or a related field.

Skills

  • Memory & AI model design
  • Computer Science
  • Debugging
  • Electrical Engineering
  • Electronic Engineering
  • Electronics
  • Field-Programmable Gate Array (FPGA)
  • Hardware Architecture
  • Hardware Design
  • Matlab
  • Mechanical Engineering
  • New Product Development
  • Oscilloscope
  • Physics
  • Printed Circuit Board Schematic Capture
  • Simulations
  • Systems Design
  • Cross-Org Skills
  • Effective Communication
  • Results Orientation
  • Learning Agility
  • Digital Fluency
  • Customer Centricity
  • Impact & Scope
  • Impacts multiple functions and influences long-term strategic direction across multiple disciplines or areas of HP.
  • Complexity
  • Invents, develops and introduces new methods and techniques that impact multiple disciplines and work groups.

Pay & Benefits

The pay range for this role is 190,000.00 - 274,000.00 annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only).

Benefits HP offers a comprehensive benefits package for this position, including:

  • Health insurance
  • Dental insurance
  • Vision insurance
  • Long term/short term disability insurance
  • Employee assistance program
  • Flexible spending account
  • Life insurance
  • Generous time off policies, including;
  • 4-12 weeks fully paid parental leave based on tenure
  • 11 paid holidays
  • Additional flexible paid vacation and sick leave (US benefits overview)

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