Digital IC Design Verification Engineer
About the role
For our client, we are seeking a Digital IC Design Verification Engineer to join the team of a leader in the Media space. This role will support the design and verification of digital integrated circuits for advanced consumer technology applications. The engineer will collaborate closely with cross-functional hardware teams to ensure robust functionality, efficient implementation, and high-quality execution. The work will span layout strategy, scripting-driven design flow improvements, and support for full-chip planning and integration. This is a hands-on opportunity to contribute to complex mixed-signal and analog-intensive designs in a fast-paced media environment.
Location: Remote - US based candidates only, no visa sponsorship available
Responsibilities
- Collaborate with a multi-disciplinary team on display IC designs for augmented reality applications
- Perform cell and block layout for analog and mixed-signal circuits
- Develop reusable scripts to enhance design flow and efficiency
- Implement layout strategies to optimize area, performance, and power
- Support IC floor planning and place & route for full-chip designs
- Provide schedule and cost inputs to program management
- Create and present design documentation for internal reviews
Qualifications
- BSEE or equivalent experience required
- 5+ years of custom layout experience
- Strong knowledge of Cadence Virtuoso and Mentor/Siemens Calibre tool suites
- Proficient in scripting languages such as TCL, SKILL, Perl, Python, and Shell
- Extensive understanding of signal integrity and layout effects
- Experience with designs including SRAM, PLLs, and ADCs
- Familiarity with 22nm and below CMOS foundry design rules preferred
Benefits
- Paid parental leave
- Comprehensive medical coverage
- Emotional and mental health support programs
- Compensation packages that include equity options
- In-person collaboration to strengthen team culture
Pay
$173,000 – $259,000 annually