Device Engineer

About the Role

Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow. The Yield Analysis & Improvement role is a critical technical leadership position focused on maximizing semiconductor manufacturing efficiency and product quality.

Responsibilities

The primary objective is to own end-to-end yield performance across wafer sort, parametric, and final testing. By leveraging advanced data mining, statistical analysis, and machine learning, the role identifies key yield limiters and develops automated analytics pipelines to correlate electrical failures with inline defect data, ensuring a seamless transition from technology launch to mass production ramp.

• Yield Analysis & Improvement: Own end-to-end yield performance across wafer sort, parametric test, and final test.
• Perform advanced data mining and statistical analysis to identify yield limiters and drive improvement actions.
• Generate yield detractors and correlate yield to electrical, inline, and defect data.
• Process & Technology Optimization: Collaborate with process integration and module teams to reduce variability and improve process windows.
• Define and execute defect reduction strategies.
• Partner with Module and Process Integration engineers to solve complex critical defect issues.
• Support technology launch, ramp, and transfer across nodes and fab.
• Root Cause & Failure Analysis: Lead root cause investigations using structured problem-solving methodologies.
• Partner with FA teams (EFA/PFA) to correlate physical defects with electrical signatures.
• Collaborate with Design and Product teams to ensure manufacturability and resolve layout-dependent yield issues before mass production ramp.
• Drive containment and corrective actions for yield excursions.
• Data Science & Modeling: Apply statistical analysis, machine learning, and predictive modeling to yield datasets.
• Develop automated analytics pipelines (Python, JMP, SQL).
• Develop and maintain sophisticated yield models.
• Yield Management (Staff-level expectation): Define yield roadmap, KPIs, and improvement strategy.
• Lead task forces for major yield excursions.
• Mentor junior engineers and establish best practices.
• Interface with executive leadership on yield health and risks.

Qualifications

The following qualifications are required:

• B.E. M.Sc., or PhD in Electrical Engineering, Materials Science, Physics, Applied Physics, or related field.
• 5+ years of experience in semiconductor yield or process integration preferred
• Foundry Background: Direct experience at a leading-edge fab focusing on FinFET or Gate-All-Around (GAA) architectures.
• Technical Skills: Strong understanding of semiconductor device physics, wafer fabrication, and transistor performance and semiconductor process (Lithography, Etch, CMP, PVD/CVD).
• Coding skills for data manipulation (Python, SQL).
• Proficiency in statistical analysis software (Spotifre, JMP, Related python library).

Pay

The current base salary range for this role is between $106,000 - $174,500. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience.

Benefits

Total compensation for this position will include a competitive benefits package, including:

• Medical, dental, and vision insurance
• Life insurance and 401(k) matching with immediate vesting
• Onsite café(s) and workout facilities
• Paid maternity and paternity leave
• Paid time off (PTO) + 2 personal holidays and 10 regular holidays
• Wellness incentives and MORE